Searched hist:"526 cd4ec" (Results 1 – 4 of 4) sorted by relevance
| /openbmc/qemu/tcg/ppc/ |
| H A D | tcg-target-con-str.h | 526cd4ec Wed Apr 19 08:13:22 CDT 2023 Richard Henderson <richard.henderson@linaro.org> tcg/ppc: Support 128-bit load/store
Use LQ/STQ with ISA v2.07, and 16-byte atomicity is required.
Note that these instructions do not require 16-byte alignment.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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| H A D | tcg-target-con-set.h | 526cd4ec Wed Apr 19 08:13:22 CDT 2023 Richard Henderson <richard.henderson@linaro.org> tcg/ppc: Support 128-bit load/store
Use LQ/STQ with ISA v2.07, and 16-byte atomicity is required.
Note that these instructions do not require 16-byte alignment.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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| H A D | tcg-target.c.inc | 526cd4ec Wed Apr 19 08:13:22 CDT 2023 Richard Henderson <richard.henderson@linaro.org> tcg/ppc: Support 128-bit load/store
Use LQ/STQ with ISA v2.07, and 16-byte atomicity is required.
Note that these instructions do not require 16-byte alignment.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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| H A D | tcg-target.h | 526cd4ec Wed Apr 19 08:13:22 CDT 2023 Richard Henderson <richard.henderson@linaro.org> tcg/ppc: Support 128-bit load/store
Use LQ/STQ with ISA v2.07, and 16-byte atomicity is required.
Note that these instructions do not require 16-byte alignment.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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