Searched hist:"4 fa1edc8" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/arch/arm64/boot/dts/renesas/ |
| H A D | rzg2lc-smarc-pinfunction.dtsi | 4fa1edc8 Thu Mar 03 10:41:54 CST 2022 Biju Das <biju.das.jz@bp.renesas.com> arm64: dts: renesas: rzg2lc-smarc: Enable i2c{0,1,2}
Enable i2c{0,1} on RZ/G2LC SMARC EVK by deleting respective
entries from board dts and adding pincontrol entries to the
soc-pinctrl dtsi. Also enable i2c2 by adding to soc dtsi.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220303164155.7706-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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| H A D | rzg2lc-smarc.dtsi | 4fa1edc8 Thu Mar 03 10:41:54 CST 2022 Biju Das <biju.das.jz@bp.renesas.com> arm64: dts: renesas: rzg2lc-smarc: Enable i2c{0,1,2}
Enable i2c{0,1} on RZ/G2LC SMARC EVK by deleting respective
entries from board dts and adding pincontrol entries to the
soc-pinctrl dtsi. Also enable i2c2 by adding to soc dtsi.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220303164155.7706-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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| H A D | r9a07g044c2-smarc.dts | 4fa1edc8 Thu Mar 03 10:41:54 CST 2022 Biju Das <biju.das.jz@bp.renesas.com> arm64: dts: renesas: rzg2lc-smarc: Enable i2c{0,1,2}
Enable i2c{0,1} on RZ/G2LC SMARC EVK by deleting respective
entries from board dts and adding pincontrol entries to the
soc-pinctrl dtsi. Also enable i2c2 by adding to soc dtsi.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220303164155.7706-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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