Searched hist:"4 a04655c" (Results 1 – 5 of 5) sorted by relevance
| /openbmc/qemu/hw/arm/ |
| H A D | stm32l4x5_soc.c | 4a04655c Sat Jan 06 12:15:03 CST 2024 Samuel Tardieu <sam@rfc1149.net> hw/arm/socs: configure priority bits for existing SOCs
Update the number of priority bits for a number of existing
SoCs according to their technical documentation:
- STM32F100/F205/F405/L4x5: 4 bits
- Stellaris (Sandstorm/Fury): 3 bits
Signed-off-by: Samuel Tardieu <sam@rfc1149.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240106181503.1746200-4-sam@rfc1149.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
| H A D | stm32f100_soc.c | 4a04655c Sat Jan 06 12:15:03 CST 2024 Samuel Tardieu <sam@rfc1149.net> hw/arm/socs: configure priority bits for existing SOCs
Update the number of priority bits for a number of existing
SoCs according to their technical documentation:
- STM32F100/F205/F405/L4x5: 4 bits
- Stellaris (Sandstorm/Fury): 3 bits
Signed-off-by: Samuel Tardieu <sam@rfc1149.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240106181503.1746200-4-sam@rfc1149.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
| H A D | stm32f405_soc.c | 4a04655c Sat Jan 06 12:15:03 CST 2024 Samuel Tardieu <sam@rfc1149.net> hw/arm/socs: configure priority bits for existing SOCs
Update the number of priority bits for a number of existing
SoCs according to their technical documentation:
- STM32F100/F205/F405/L4x5: 4 bits
- Stellaris (Sandstorm/Fury): 3 bits
Signed-off-by: Samuel Tardieu <sam@rfc1149.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240106181503.1746200-4-sam@rfc1149.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
| H A D | stm32f205_soc.c | 4a04655c Sat Jan 06 12:15:03 CST 2024 Samuel Tardieu <sam@rfc1149.net> hw/arm/socs: configure priority bits for existing SOCs
Update the number of priority bits for a number of existing
SoCs according to their technical documentation:
- STM32F100/F205/F405/L4x5: 4 bits
- Stellaris (Sandstorm/Fury): 3 bits
Signed-off-by: Samuel Tardieu <sam@rfc1149.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240106181503.1746200-4-sam@rfc1149.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
| H A D | stellaris.c | 4a04655c Sat Jan 06 12:15:03 CST 2024 Samuel Tardieu <sam@rfc1149.net> hw/arm/socs: configure priority bits for existing SOCs
Update the number of priority bits for a number of existing
SoCs according to their technical documentation:
- STM32F100/F205/F405/L4x5: 4 bits
- Stellaris (Sandstorm/Fury): 3 bits
Signed-off-by: Samuel Tardieu <sam@rfc1149.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240106181503.1746200-4-sam@rfc1149.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|