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| H A D | ddr.c | 43104795 Mon Mar 25 02:39:36 CDT 2013 York Sun <yorksun@freescale.com> powerpc/b4860qds: Assign DDR address in board file
B4860QDS requires DDRC2 has 0 as base address and DDRC1 has higher address.
This is the requirement for DSP cores to run in 32-bit address space.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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