Searched hist:"3 b621cca" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/u-boot/arch/x86/cpu/ |
| H A D | mtrr.c | 3b621cca Wed Jan 21 21:29:41 CST 2015 Bin Meng <bmeng.cn@gmail.com> x86: Test mtrr support flag before accessing mtrr msr
On some x86 processors (like Intel Quark) the MTRR registers are not
supported. This is reflected by the CPUID (EAX 01H) result EDX[12].
Accessing the MTRR registers on such processors will cause #GP so we
must test the support flag before accessing MTRR MSRs.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
| /openbmc/u-boot/arch/x86/include/asm/ |
| H A D | mtrr.h | 3b621cca Wed Jan 21 21:29:41 CST 2015 Bin Meng <bmeng.cn@gmail.com> x86: Test mtrr support flag before accessing mtrr msr
On some x86 processors (like Intel Quark) the MTRR registers are not
supported. This is reflected by the CPUID (EAX 01H) result EDX[12].
Accessing the MTRR registers on such processors will cause #GP so we
must test the support flag before accessing MTRR MSRs.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
| /openbmc/u-boot/arch/x86/lib/ |
| H A D | init_helpers.c | 3b621cca Wed Jan 21 21:29:41 CST 2015 Bin Meng <bmeng.cn@gmail.com> x86: Test mtrr support flag before accessing mtrr msr
On some x86 processors (like Intel Quark) the MTRR registers are not
supported. This is reflected by the CPUID (EAX 01H) result EDX[12].
Accessing the MTRR registers on such processors will cause #GP so we
must test the support flag before accessing MTRR MSRs.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|