| H A D | msr-index.h | 32b734e0 Mon Oct 19 11:28:04 CDT 2020 Arnaldo Carvalho de Melo <acme@redhat.com> tools arch x86: Sync the msr-index.h copy with the kernel sources
To pick up the changes in:
29dcc60f6a19fb0a ("x86/boot/compressed/64: Add stage1 #VC handler")
36e1be8ada994d50 ("perf/x86/amd/ibs: Fix raw sample data accumulation")
59a854e2f3b90ad2 ("perf/x86/intel: Support TopDown metrics on Ice Lake")
7b2c05a15d29d057 ("perf/x86/intel: Generic support for hardware TopDown metrics")
99e40204e014e066 ("x86/msr: Move the F15h MSRs where they belong")
b57de6cd16395be1 ("x86/sev-es: Add SEV-ES Feature Detection")
ed7bde7a6dab521e ("cpufreq: intel_pstate: Allow enable/disable energy efficiency")
f0f2f9feb4ee6f28 ("x86/msr-index: Define an IA32_PASID MSR")
That cause these changes in tooling:
$ tools/perf/trace/beauty/tracepoints/x86_msr.sh > before
$ cp arch/x86/include/asm/msr-index.h tools/arch/x86/include/asm/msr-index.h
$ tools/perf/trace/beauty/tracepoints/x86_msr.sh > after
$ diff -u before after
--- before 2020-10-19 13:27:33.195274425 -0300
+++ after 2020-10-19 13:27:44.144507610 -0300
@@ -113,6 +113,8 @@
[0x00000309] = "CORE_PERF_FIXED_CTR0",
[0x0000030a] = "CORE_PERF_FIXED_CTR1",
[0x0000030b] = "CORE_PERF_FIXED_CTR2",
+ [0x0000030c] = "CORE_PERF_FIXED_CTR3",
+ [0x00000329] = "PERF_METRICS",
[0x00000345] = "IA32_PERF_CAPABILITIES",
[0x0000038d] = "CORE_PERF_FIXED_CTR_CTRL",
[0x0000038e] = "CORE_PERF_GLOBAL_STATUS",
@@ -222,6 +224,7 @@
[0x00000774] = "HWP_REQUEST",
[0x00000777] = "HWP_STATUS",
[0x00000d90] = "IA32_BNDCFGS",
+ [0x00000d93] = "IA32_PASID",
[0x00000da0] = "IA32_XSS",
[0x00000dc0] = "LBR_INFO_0",
[0x00000ffc] = "IA32_BNDCFGS_RSVD",
@@ -279,6 +282,7 @@
[0xc0010115 - x86_AMD_V_KVM_MSRs_offset] = "VM_IGNNE",
[0xc0010117 - x86_AMD_V_KVM_MSRs_offset] = "VM_HSAVE_PA",
[0xc001011f - x86_AMD_V_KVM_MSRs_offset] = "AMD64_VIRT_SPEC_CTRL",
+ [0xc0010130 - x86_AMD_V_KVM_MSRs_offset] = "AMD64_SEV_ES_GHCB",
[0xc0010131 - x86_AMD_V_KVM_MSRs_offset] = "AMD64_SEV",
[0xc0010140 - x86_AMD_V_KVM_MSRs_offset] = "AMD64_OSVW_ID_LENGTH",
[0xc0010141 - x86_AMD_V_KVM_MSRs_offset] = "AMD64_OSVW_STATUS",
$
Which causes these parts of tools/perf/ to be rebuilt:
CC /tmp/build/perf/trace/beauty/tracepoints/x86_msr.o
DESCEND plugins
GEN /tmp/build/perf/python/perf.so
INSTALL trace_plugins
LD /tmp/build/perf/trace/beauty/tracepoints/perf-in.o
LD /tmp/build/perf/trace/beauty/perf-in.o
LD /tmp/build/perf/perf-in.o
LINK /tmp/build/perf/per
At some point these should just be tables read by perf on demand.
This addresses this perf tools build warning:
diff -u tools/arch/x86/include/asm/msr-index.h arch/x86/include/asm/msr-index.h
Warning: Kernel ABI header at 'tools/arch/x86/include/asm/msr-index.h' differs from latest version at 'arch/x86/include/asm/msr-index.h'
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Joerg Roedel <jroedel@suse.de>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kim Phillips <kim.phillips@amd.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
32b734e0 Mon Oct 19 11:28:04 CDT 2020 Arnaldo Carvalho de Melo <acme@redhat.com> tools arch x86: Sync the msr-index.h copy with the kernel sources
To pick up the changes in:
29dcc60f6a19fb0a ("x86/boot/compressed/64: Add stage1 #VC handler")
36e1be8ada994d50 ("perf/x86/amd/ibs: Fix raw sample data accumulation")
59a854e2f3b90ad2 ("perf/x86/intel: Support TopDown metrics on Ice Lake")
7b2c05a15d29d057 ("perf/x86/intel: Generic support for hardware TopDown metrics")
99e40204e014e066 ("x86/msr: Move the F15h MSRs where they belong")
b57de6cd16395be1 ("x86/sev-es: Add SEV-ES Feature Detection")
ed7bde7a6dab521e ("cpufreq: intel_pstate: Allow enable/disable energy efficiency")
f0f2f9feb4ee6f28 ("x86/msr-index: Define an IA32_PASID MSR")
That cause these changes in tooling:
$ tools/perf/trace/beauty/tracepoints/x86_msr.sh > before
$ cp arch/x86/include/asm/msr-index.h tools/arch/x86/include/asm/msr-index.h
$ tools/perf/trace/beauty/tracepoints/x86_msr.sh > after
$ diff -u before after
--- before 2020-10-19 13:27:33.195274425 -0300
+++ after 2020-10-19 13:27:44.144507610 -0300
@@ -113,6 +113,8 @@
[0x00000309] = "CORE_PERF_FIXED_CTR0",
[0x0000030a] = "CORE_PERF_FIXED_CTR1",
[0x0000030b] = "CORE_PERF_FIXED_CTR2",
+ [0x0000030c] = "CORE_PERF_FIXED_CTR3",
+ [0x00000329] = "PERF_METRICS",
[0x00000345] = "IA32_PERF_CAPABILITIES",
[0x0000038d] = "CORE_PERF_FIXED_CTR_CTRL",
[0x0000038e] = "CORE_PERF_GLOBAL_STATUS",
@@ -222,6 +224,7 @@
[0x00000774] = "HWP_REQUEST",
[0x00000777] = "HWP_STATUS",
[0x00000d90] = "IA32_BNDCFGS",
+ [0x00000d93] = "IA32_PASID",
[0x00000da0] = "IA32_XSS",
[0x00000dc0] = "LBR_INFO_0",
[0x00000ffc] = "IA32_BNDCFGS_RSVD",
@@ -279,6 +282,7 @@
[0xc0010115 - x86_AMD_V_KVM_MSRs_offset] = "VM_IGNNE",
[0xc0010117 - x86_AMD_V_KVM_MSRs_offset] = "VM_HSAVE_PA",
[0xc001011f - x86_AMD_V_KVM_MSRs_offset] = "AMD64_VIRT_SPEC_CTRL",
+ [0xc0010130 - x86_AMD_V_KVM_MSRs_offset] = "AMD64_SEV_ES_GHCB",
[0xc0010131 - x86_AMD_V_KVM_MSRs_offset] = "AMD64_SEV",
[0xc0010140 - x86_AMD_V_KVM_MSRs_offset] = "AMD64_OSVW_ID_LENGTH",
[0xc0010141 - x86_AMD_V_KVM_MSRs_offset] = "AMD64_OSVW_STATUS",
$
Which causes these parts of tools/perf/ to be rebuilt:
CC /tmp/build/perf/trace/beauty/tracepoints/x86_msr.o
DESCEND plugins
GEN /tmp/build/perf/python/perf.so
INSTALL trace_plugins
LD /tmp/build/perf/trace/beauty/tracepoints/perf-in.o
LD /tmp/build/perf/trace/beauty/perf-in.o
LD /tmp/build/perf/perf-in.o
LINK /tmp/build/perf/per
At some point these should just be tables read by perf on demand.
This addresses this perf tools build warning:
diff -u tools/arch/x86/include/asm/msr-index.h arch/x86/include/asm/msr-index.h
Warning: Kernel ABI header at 'tools/arch/x86/include/asm/msr-index.h' differs from latest version at 'arch/x86/include/asm/msr-index.h'
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Joerg Roedel <jroedel@suse.de>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kim Phillips <kim.phillips@amd.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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