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/openbmc/u-boot/drivers/ram/aspeed/
H A Dsdram_phy_ast2600.h323f39fb Wed Sep 21 21:04:22 CDT 2022 Dylan Hung <dylan_hung@aspeedtech.com> ram: ast2600: use macro to represent DRAM MR

Use macro to represent DRAM mode registers. Both DDR-PHY and DDR
controller have their own registers for MR configuration, use the same
values for both side.

Also, this commit modifies the default RTT and RON setting
RTT_WR: disable
RTT_NOM: 48 ohm
RTT_PARK: 48 ohm
DRAM output driver impedance: 34 ohm
PHY Ron: 34 ohm
PHY ODT: 80 ohm

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Change-Id: I38be1ef106a914dcfb5da3149ff59ca6ec4f3fbb
H A DKconfig323f39fb Wed Sep 21 21:04:22 CDT 2022 Dylan Hung <dylan_hung@aspeedtech.com> ram: ast2600: use macro to represent DRAM MR

Use macro to represent DRAM mode registers. Both DDR-PHY and DDR
controller have their own registers for MR configuration, use the same
values for both side.

Also, this commit modifies the default RTT and RON setting
RTT_WR: disable
RTT_NOM: 48 ohm
RTT_PARK: 48 ohm
DRAM output driver impedance: 34 ohm
PHY Ron: 34 ohm
PHY ODT: 80 ohm

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Change-Id: I38be1ef106a914dcfb5da3149ff59ca6ec4f3fbb
H A Dsdram_ast2600.c323f39fb Wed Sep 21 21:04:22 CDT 2022 Dylan Hung <dylan_hung@aspeedtech.com> ram: ast2600: use macro to represent DRAM MR

Use macro to represent DRAM mode registers. Both DDR-PHY and DDR
controller have their own registers for MR configuration, use the same
values for both side.

Also, this commit modifies the default RTT and RON setting
RTT_WR: disable
RTT_NOM: 48 ohm
RTT_PARK: 48 ohm
DRAM output driver impedance: 34 ohm
PHY Ron: 34 ohm
PHY ODT: 80 ohm

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Change-Id: I38be1ef106a914dcfb5da3149ff59ca6ec4f3fbb