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| H A D | spi-cadence-quadspi.c | 1aeda096 Wed Apr 20 10:56:16 CDT 2022 Matthias Schiffer <matthias.schiffer@ew.tq-group.com> spi: cadence-quadspi: allow operations with cmd/addr buswidth >1
With the removal of the incorrect logic of cqspi_set_protocol(), ops with
cmd/addr buswidth >1 are now working correctly.
Tested on a TI AM64x with a Macronix MX25U51245G QSPI flash using 1-4-4
operations.
DTR operations are currently untested, so we leave them disabled for now
(except for the previously allowed 8-8-8 ops).
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Link: https://lore.kernel.org/r/20220420155616.281730-2-matthias.schiffer@ew.tq-group.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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