Searched hist:14824105 (Results 1 – 4 of 4) sorted by relevance
| /openbmc/u-boot/board/freescale/mx53evk/ |
| H A D | imximage.cfg | 14824105 Thu Mar 22 07:00:31 CDT 2012 Troy Kisky <troy.kisky@boundarydevices.com> MX53: DDR: Fix ZQHWCTRL field TZQ_CS
Currently, board files are setting this field to 0x01
which the manual says is a reserved value. Change to
use the default of 0x02 - 128 cycles.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
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| /openbmc/u-boot/board/freescale/mx53ard/ |
| H A D | imximage_dd3.cfg | 14824105 Thu Mar 22 07:00:31 CDT 2012 Troy Kisky <troy.kisky@boundarydevices.com> MX53: DDR: Fix ZQHWCTRL field TZQ_CS
Currently, board files are setting this field to 0x01
which the manual says is a reserved value. Change to
use the default of 0x02 - 128 cycles.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
|
| /openbmc/u-boot/board/freescale/mx53smd/ |
| H A D | imximage.cfg | 14824105 Thu Mar 22 07:00:31 CDT 2012 Troy Kisky <troy.kisky@boundarydevices.com> MX53: DDR: Fix ZQHWCTRL field TZQ_CS
Currently, board files are setting this field to 0x01
which the manual says is a reserved value. Change to
use the default of 0x02 - 128 cycles.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
|
| /openbmc/u-boot/board/freescale/mx53loco/ |
| H A D | imximage.cfg | 14824105 Thu Mar 22 07:00:31 CDT 2012 Troy Kisky <troy.kisky@boundarydevices.com> MX53: DDR: Fix ZQHWCTRL field TZQ_CS
Currently, board files are setting this field to 0x01
which the manual says is a reserved value. Change to
use the default of 0x02 - 128 cycles.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
|