| /openbmc/linux/arch/mips/pci/ |
| H A D | msi-octeon.c | 0c326387 Fri Mar 25 14:38:51 CDT 2011 David Daney <ddaney@caviumnetworks.com> MIPS: Octeon: Rewrite interrupt handling code.
This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.
The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.
[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
__irq_set_affinity_lock ]
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
0c326387 Fri Mar 25 14:38:51 CDT 2011 David Daney <ddaney@caviumnetworks.com> MIPS: Octeon: Rewrite interrupt handling code.
This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.
The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.
[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
__irq_set_affinity_lock ]
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
|
| /openbmc/linux/arch/mips/include/asm/mach-cavium-octeon/ |
| H A D | irq.h | 0c326387 Fri Mar 25 14:38:51 CDT 2011 David Daney <ddaney@caviumnetworks.com> MIPS: Octeon: Rewrite interrupt handling code.
This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.
The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.
[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
__irq_set_affinity_lock ]
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
0c326387 Fri Mar 25 14:38:51 CDT 2011 David Daney <ddaney@caviumnetworks.com> MIPS: Octeon: Rewrite interrupt handling code.
This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.
The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.
[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
__irq_set_affinity_lock ]
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
|
| /openbmc/linux/arch/mips/include/asm/octeon/ |
| H A D | octeon.h | 0c326387 Fri Mar 25 14:38:51 CDT 2011 David Daney <ddaney@caviumnetworks.com> MIPS: Octeon: Rewrite interrupt handling code.
This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.
The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.
[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
__irq_set_affinity_lock ]
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
0c326387 Fri Mar 25 14:38:51 CDT 2011 David Daney <ddaney@caviumnetworks.com> MIPS: Octeon: Rewrite interrupt handling code.
This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.
The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.
[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
__irq_set_affinity_lock ]
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
|
| /openbmc/linux/arch/mips/cavium-octeon/ |
| H A D | smp.c | 0c326387 Fri Mar 25 14:38:51 CDT 2011 David Daney <ddaney@caviumnetworks.com> MIPS: Octeon: Rewrite interrupt handling code.
This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.
The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.
[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
__irq_set_affinity_lock ]
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
0c326387 Fri Mar 25 14:38:51 CDT 2011 David Daney <ddaney@caviumnetworks.com> MIPS: Octeon: Rewrite interrupt handling code.
This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.
The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.
[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
__irq_set_affinity_lock ]
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
|
| H A D | octeon-irq.c | 0c326387 Fri Mar 25 14:38:51 CDT 2011 David Daney <ddaney@caviumnetworks.com> MIPS: Octeon: Rewrite interrupt handling code.
This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.
The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.
[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
__irq_set_affinity_lock ]
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
0c326387 Fri Mar 25 14:38:51 CDT 2011 David Daney <ddaney@caviumnetworks.com> MIPS: Octeon: Rewrite interrupt handling code.
This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.
The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.
[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
__irq_set_affinity_lock ]
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
|
| H A D | setup.c | 0c326387 Fri Mar 25 14:38:51 CDT 2011 David Daney <ddaney@caviumnetworks.com> MIPS: Octeon: Rewrite interrupt handling code.
This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.
The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.
[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
__irq_set_affinity_lock ]
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
0c326387 Fri Mar 25 14:38:51 CDT 2011 David Daney <ddaney@caviumnetworks.com> MIPS: Octeon: Rewrite interrupt handling code.
This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.
The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.
[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
__irq_set_affinity_lock ]
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
|