Searched hist:"06 d336cc" (Results 1 – 5 of 5) sorted by relevance
| /openbmc/u-boot/arch/x86/include/asm/ |
| H A D | intel_regs.h | 06d336cc Fri Mar 11 23:06:55 CST 2016 Simon Glass <sjg@chromium.org> x86: Create a common header for Intel register access
There are several blocks of registers that are accessed from all over the
code on Intel CPUs. These don't currently have their own driver and it is
not clear whether having a driver makes sense.
An example is the Memory Controller Hub (MCH). We map it to a known location
on some Intel chips (mostly those without FSP - Firmware Support Package).
Add a new header file for these registers, and move MCH into it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
| /openbmc/u-boot/arch/x86/include/asm/arch-ivybridge/ |
| H A D | sandybridge.h | 06d336cc Fri Mar 11 23:06:55 CST 2016 Simon Glass <sjg@chromium.org> x86: Create a common header for Intel register access
There are several blocks of registers that are accessed from all over the
code on Intel CPUs. These don't currently have their own driver and it is
not clear whether having a driver makes sense.
An example is the Memory Controller Hub (MCH). We map it to a known location
on some Intel chips (mostly those without FSP - Firmware Support Package).
Add a new header file for these registers, and move MCH into it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
| /openbmc/u-boot/arch/x86/cpu/ivybridge/ |
| H A D | northbridge.c | 06d336cc Fri Mar 11 23:06:55 CST 2016 Simon Glass <sjg@chromium.org> x86: Create a common header for Intel register access
There are several blocks of registers that are accessed from all over the
code on Intel CPUs. These don't currently have their own driver and it is
not clear whether having a driver makes sense.
An example is the Memory Controller Hub (MCH). We map it to a known location
on some Intel chips (mostly those without FSP - Firmware Support Package).
Add a new header file for these registers, and move MCH into it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
| H A D | cpu.c | 06d336cc Fri Mar 11 23:06:55 CST 2016 Simon Glass <sjg@chromium.org> x86: Create a common header for Intel register access
There are several blocks of registers that are accessed from all over the
code on Intel CPUs. These don't currently have their own driver and it is
not clear whether having a driver makes sense.
An example is the Memory Controller Hub (MCH). We map it to a known location
on some Intel chips (mostly those without FSP - Firmware Support Package).
Add a new header file for these registers, and move MCH into it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
| H A D | sdram.c | 06d336cc Fri Mar 11 23:06:55 CST 2016 Simon Glass <sjg@chromium.org> x86: Create a common header for Intel register access
There are several blocks of registers that are accessed from all over the
code on Intel CPUs. These don't currently have their own driver and it is
not clear whether having a driver makes sense.
An example is the Memory Controller Hub (MCH). We map it to a known location
on some Intel chips (mostly those without FSP - Firmware Support Package).
Add a new header file for these registers, and move MCH into it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|