Searched hist:"02 fdfd70" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | keystone-pll.txt | 02fdfd70 Fri May 29 11:04:12 CDT 2015 Murali Karicheri <m-karicheri2@ti.com> clk: keystone: add support for post divider register for main pll
Main PLL controller has post divider bits in a separate register in
pll controller. Use the value from this register instead of fixed
divider when available.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
02fdfd70 Fri May 29 11:04:12 CDT 2015 Murali Karicheri <m-karicheri2@ti.com> clk: keystone: add support for post divider register for main pll
Main PLL controller has post divider bits in a separate register in
pll controller. Use the value from this register instead of fixed
divider when available.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
|
| /openbmc/linux/drivers/clk/keystone/ |
| H A D | pll.c | 02fdfd70 Fri May 29 11:04:12 CDT 2015 Murali Karicheri <m-karicheri2@ti.com> clk: keystone: add support for post divider register for main pll
Main PLL controller has post divider bits in a separate register in
pll controller. Use the value from this register instead of fixed
divider when available.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
02fdfd70 Fri May 29 11:04:12 CDT 2015 Murali Karicheri <m-karicheri2@ti.com> clk: keystone: add support for post divider register for main pll
Main PLL controller has post divider bits in a separate register in
pll controller. Use the value from this register instead of fixed
divider when available.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
|