Searched hist:"01 d675f1" (Results 1 – 2 of 2) sorted by relevance
/openbmc/linux/arch/arm/mach-shmobile/ |
H A D | pm-rcar-gen2.c | 01d675f1 Mon Feb 12 11:44:19 CST 2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com> ARM: shmobile: rcar-gen2: Add watchdog support
This patch adds watchdog support by installing shmobile_boot_vector_gen2 to ICRAM1 when enough memory is available, in which case we also keep a copy of MPIDR to complete the reset vector logic.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> 01d675f1 Mon Feb 12 11:44:19 CST 2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com> ARM: shmobile: rcar-gen2: Add watchdog support This patch adds watchdog support by installing shmobile_boot_vector_gen2 to ICRAM1 when enough memory is available, in which case we also keep a copy of MPIDR to complete the reset vector logic. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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H A D | platsmp-apmu.c | 01d675f1 Mon Feb 12 11:44:19 CST 2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com> ARM: shmobile: rcar-gen2: Add watchdog support
This patch adds watchdog support by installing shmobile_boot_vector_gen2 to ICRAM1 when enough memory is available, in which case we also keep a copy of MPIDR to complete the reset vector logic.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> 01d675f1 Mon Feb 12 11:44:19 CST 2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com> ARM: shmobile: rcar-gen2: Add watchdog support This patch adds watchdog support by installing shmobile_boot_vector_gen2 to ICRAM1 when enough memory is available, in which case we also keep a copy of MPIDR to complete the reset vector logic. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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