| /openbmc/linux/Documentation/devicetree/bindings/power/reset/ |
| H A D | xlnx,zynqmp-power.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/xlnx,zynqmp-power.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michal Simek <michal.simek@amd.com>
13 The zynqmp-power node describes the power management configurations.
18 const: xlnx,zynqmp-power
25 Standard property to specify a Mailbox. Each value of
27 mailbox controller device node and an args specifier
28 that will be the phandle to the intended sub-mailbox
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| /openbmc/linux/Documentation/devicetree/bindings/mailbox/ |
| H A D | xlnx,zynqmp-ipi-mailbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/xlnx,zynqmp-ipi-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx IPI(Inter Processor Interrupt) mailbox controller
10 The Xilinx IPI(Inter Processor Interrupt) mailbox controller is to manage
14 +-------------------------------------+
15 | Xilinx ZynqMP IPI Controller |
16 +-------------------------------------+
17 +--------------------------------------------------+
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| /openbmc/linux/drivers/mailbox/ |
| H A D | zynqmp-ipi-mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Xilinx Inter Processor Interrupt(IPI) Mailbox Driver
8 #include <linux/arm-smccc.h>
15 #include <linux/mailbox/zynqmp-ipi-message.h>
24 /* indicate if ZynqMP IPI mailbox driver uses SMC calls or HVC calls */
47 /* IPI mailbox status */
52 #define IPI_MB_CHNL_TX 0 /* IPI mailbox TX channel */
53 #define IPI_MB_CHNL_RX 1 /* IPI mailbox RX channel */
56 * struct zynqmp_ipi_mchan - Description of a Xilinx ZynqMP IPI mailbox channel
76 * struct zynqmp_ipi_mbox - Description of a ZynqMP IPI mailbox
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| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
2 menuconfig MAILBOX config
3 bool "Mailbox Hardware Support"
5 Mailbox is a framework to control hardware communication between
6 on-chip processors through queued messages and interrupt driven
9 if MAILBOX
12 tristate "Apple Mailbox driver"
16 Apple SoCs have various co-processors required for certain
18 driver adds support for the mailbox controller used to
24 tristate "ARM MHU Mailbox"
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| H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
2 # Generic MAILBOX API
4 obj-$(CONFIG_MAILBOX) += mailbox.o
6 obj-$(CONFIG_MAILBOX_TEST) += mailbox-test.o
8 obj-$(CONFIG_ARM_MHU) += arm_mhu.o arm_mhu_db.o
10 obj-$(CONFIG_ARM_MHU_V2) += arm_mhuv2.o
12 obj-$(CONFIG_IMX_MBOX) += imx-mailbox.o
14 obj-$(CONFIG_ARMADA_37XX_RWTM_MBOX) += armada-37xx-rwtm-mailbox.o
16 obj-$(CONFIG_PLATFORM_MHU) += platform_mhu.o
18 obj-$(CONFIG_PL320_MBOX) += pl320-ipc.o
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| /openbmc/linux/Documentation/devicetree/bindings/remoteproc/ |
| H A D | xlnx,zynqmp-r5fss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/xlnx,zynqmp-r5fss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ben Levinsky <ben.levinsky@amd.com>
11 - Tanmay Shah <tanmay.shah@amd.com>
14 The Xilinx platforms include a pair of Cortex-R5F processors (RPU) for
15 real-time processing based on the Cortex-R5F processor core from ARM.
16 The Cortex-R5F processor implements the Arm v7-R architecture and includes a
17 floating-point unit that implements the Arm VFPv3 instruction set.
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| /openbmc/linux/drivers/remoteproc/ |
| H A D | xlnx_r5_remoteproc.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * ZynqMP R5 Remote Processor driver
7 #include <dt-bindings/power/xlnx-zynqmp-power.h>
8 #include <linux/dma-mapping.h>
9 #include <linux/firmware/xlnx-zynqmp.h>
12 #include <linux/mailbox/zynqmp-ipi-message.h>
25 /* RX mailbox client buffer max length */
30 * reflects possible values of xlnx,cluster-mode dt-property
34 LOCKSTEP_MODE = 1, /* cores execute same code in lockstep,clk-for-clk */
39 * struct mem_bank_data - Memory Bank description
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| /openbmc/linux/drivers/soc/xilinx/ |
| H A D | zynqmp_power.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2019 Xilinx, Inc.
19 #include <linux/firmware/xlnx-zynqmp.h>
20 #include <linux/firmware/xlnx-event-manager.h>
21 #include <linux/mailbox/zynqmp-ipi-message.h>
24 * struct zynqmp_pm_work_struct - Wrapper for struct work_struct
47 [PM_SUSPEND_MODE_POWER_OFF] = "power-off",
60 if (work_pending(&zynqmp_pm_init_suspend_work->callback_work)) in suspend_event_callback()
64 memcpy(zynqmp_pm_init_suspend_work->args, &payload[1], in suspend_event_callback()
65 sizeof(zynqmp_pm_init_suspend_work->args)); in suspend_event_callback()
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| /openbmc/linux/arch/arm64/boot/dts/xilinx/ |
| H A D | zynqmp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP
5 * (C) Copyright 2014 - 2021, Xilinx, Inc.
15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/power/xlnx-zynqmp-power.h>
20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
23 compatible = "xlnx,zynqmp";
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| /openbmc/linux/Documentation/devicetree/bindings/media/ |
| H A D | allegro,al5e.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Tretter <m.tretter@pengutronix.de>
12 description: |-
13 Allegro DVT video IP codecs present in the Xilinx ZynqMP SoC. The IP core may
17 software uses a provided mailbox interface to communicate with the MCU. The
23 - items:
24 - const: allegro,al5e-1.1
25 - const: allegro,al5e
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| /openbmc/linux/arch/arm64/ |
| H A D | Kconfig.platforms | 1 # SPDX-License-Identifier: GPL-2.0-only
12 bool "Allwinner sunxi 64-bit SoC Family"
33 This enables support for Apple's in-house ARM SoC family, starting
67 Say Y if you intend to run the kernel on a Broadcom Broadband ARM-based
70 This enables support for Broadcom BCA ARM-based broadband chipsets,
74 bool "Broadcom Set-Top-Box SoCs"
115 This enables support for the Microchip Sparx5 ARMv8-based
116 SoC family of TSN-capable gigabit switches.
118 The SparX-5 Ethernet switch family provides a rich set of
119 switching features such as advanced TCAM-based VLAN and QoS
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| /openbmc/linux/drivers/crypto/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
39 called padlock-aes.
53 called padlock-sha.
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
65 will be called geode-aes.
131 and uses triple-DES to generate secure random numbers like the
132 ANSI X9.17 standard. User-space programs access the
133 pseudo-random-number device through the char device /dev/prandom.
149 sub-units. One set provides the Modular Arithmetic Unit,
250 This option provides the kernel-side support for the TRNG hardware
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| /openbmc/linux/drivers/dma/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
112 tristate "Analog Devices AXI-DMAC DMA support"
118 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
125 depends on MAILBOX && RAID6_PQ
154 tristate "SA-11x0 DMA support"
159 Support the DMA engine found on Intel StrongARM SA-1100 and
160 SA-1110 SoCs. This DMA engine can only be used with on-chip
220 This module can be found on Freescale Vybrid and LS-1 SoCs.
263 Enable support for the IMG multi-threaded DMA controller (MDC).
283 tristate "Intel integrated DMA 64-bit support"
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| /openbmc/qemu/hw/arm/ |
| H A D | xlnx-versal-virt.c | 13 #include "qemu/error-report.h"
20 #include "hw/qdev-properties.h"
21 #include "hw/arm/xlnx-versal.h"
26 #define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("xlnx-versal-virt")
61 s->fdt = create_device_tree(&s->fdt_size); in fdt_create()
62 if (!s->fdt) { in fdt_create()
68 s->phandle.gic = qemu_fdt_alloc_phandle(s->fdt); in fdt_create()
69 for (i = 0; i < ARRAY_SIZE(s->phandle.ethernet_phy); i++) { in fdt_create()
70 s->phandle.ethernet_phy[i] = qemu_fdt_alloc_phandle(s->fdt); in fdt_create()
72 s->phandle.clk_25Mhz = qemu_fdt_alloc_phandle(s->fdt); in fdt_create()
[all …]
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| /openbmc/linux/drivers/gpio/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
47 this symbol, but new drivers should use the generic gpio-regmap
57 non-sleeping contexts. They can make bitbanged serial protocols
118 Enables support for the idio-16 library functions. The idio-16 library
120 ACCES IDIO-16 family such as the 104-IDIO-16 and the PCI-IDIO-16.
122 If built as a module its name will be gpio-idio-16.
128 tristate "GPIO driver for 74xx-ICs with MMIO access"
132 Say yes here to support GPIO functionality for 74xx-compatible ICs
149 If driver is built as a module it will be called gpio-altera.
193 the firmware mailbox to communicate with VideoCore on BCM283x chips.
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| /openbmc/linux/ |
| H A D | MAINTAINERS | 5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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| H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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| H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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| H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
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| /openbmc/ |
| D | opengrok1.0.log | 1 2025-01-24 03:00:36.558-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-01-24 03:00:36.684-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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| D | opengrok2.0.log | 1 2025-01-23 03:00:35.620-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-01-23 03:00:35.747-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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