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/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-matmap.h150 * way = each TLB (ITLB and DTLB) consists of a number of "ways"
153 * one way matches the vaddr; if none match, it is a miss;
155 * each way can be independently configured in terms of number of
161 * min-wired = a "min-wired" way can be used to map a single (minimum-sized)
163 * is non-auto-refill (some other way(s) must be auto-refill),
168 * TLB way entries are virtually indexed.
173 * whose bits n*4+3 .. n*4 index the list of page sizes for way n
174 * (XCHAL_xTLB_SETm_PAGESZ_LOG2_LIST for set m corresponding to way n);
178 * this list; unsupported sizes for a given way are zero in the list;
194 #define XCHAL_ITLB_WAYS 7 /* number of ways (n-way set-associative TLB) */
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/openbmc/u-boot/arch/powerpc/include/asm/
H A De300.h84 #define HID2_IWLCK_001 0x00002000 /* way 0 locked */
85 #define HID2_IWLCK_010 0x00004000 /* way 0 through way 1 locked */
86 #define HID2_IWLCK_011 0x00006000 /* way 0 through way 2 locked */
87 #define HID2_IWLCK_100 0x00008000 /* way 0 through way 3 locked */
88 #define HID2_IWLCK_101 0x0000A000 /* way 0 through way 4 locked */
89 #define HID2_IWLCK_110 0x0000C000 /* way 0 through way 5 locked */
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-matmap.h134 * way = each TLB (ITLB and DTLB) consists of a number of "ways"
137 * one way matches the vaddr; if none match, it is a miss;
139 * each way can be independently configured in terms of number of
145 * min-wired = a "min-wired" way can be used to map a single (minimum-sized)
147 * is non-auto-refill (some other way(s) must be auto-refill),
152 * TLB way entries are virtually indexed.
157 * whose bits n*4+3 .. n*4 index the list of page sizes for way n
158 * (XCHAL_xTLB_SETm_PAGESZ_LOG2_LIST for set m corresponding to way n);
162 * this list; unsupported sizes for a given way are zero in the list;
178 #define XCHAL_ITLB_WAYS 1 /* number of ways (n-way set-associative TLB) */
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/openbmc/qemu/docs/
H A Dqdev-device-use.txt45 The new way keeps the parts separate: you create the host part with
57 In the new way, this becomes something like
73 * media is special. In the old way, it selects disk vs. CD-ROM with
74 if=ide, if=scsi and if=xen. The new way uses DEVNAME for that.
90 The old way implicitly creates SCSI controllers as needed. The new
91 way makes that explicit:
128 For USB devices, the old way was actually different:
134 The old way provided much less control than -drive's OPTS... The new
135 way fixes that:
156 The new way keeps the parts separate: you create the host part with
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/openbmc/u-boot/arch/arm/cpu/armv7/
H A Dcache_v7_asm.S45 ands r4, r4, r1, lsr #3 @ find maximum number on the way size
46 clz r5, r4 @ find bit position of way size increment
52 ARM( orr r11, r10, r4, lsl r5 ) @ factor way and cache number into r11
54 THUMB( orr r11, r10, r6 ) @ factor way and cache number into r11
58 mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
61 subs r4, r4, #1 @ decrement the way
115 ands r4, r4, r1, lsr #3 @ find maximum number on the way size
116 clz r5, r4 @ find bit position of way size increment
122 ARM( orr r11, r10, r4, lsl r5 ) @ factor way and cache number into r11
124 THUMB( orr r11, r10, r6 ) @ factor way and cache number into r11
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/openbmc/openbmc/poky/meta/files/common-licenses/
H A DSimple-2.021 …way, you may only recover direct damages up to the amount you paid for it (that is zero if you did…
26 …s a license form to use in any way that you find helpful. To avoid confusion, however, if you cha…
H A DSimPL-2.028 …way, you may only recover direct damages up to the amount you paid for it (that is zero if you did…
37 …s a license form to use in any way that you find helpful. To avoid confusion, however, if you cha…
H A DNet-SNMP21 …RICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF T…
31 …RICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF T…
51 …RICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF T…
61 …RICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF T…
71 …RICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF T…
85 …RICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF T…
97 …RICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF T…
107 …RICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF T…
H A DClArtistic43 the Copyright Holder. A Package modified in such a way shall still be
46 3. You may otherwise modify your copy of this Package in any way, provided
69 in some specific way.
121 not change the language in any way that would cause it to fail the
H A DInner-Net-2.010 way or form.
31 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
/openbmc/u-boot/doc/
H A DREADME.N121323 - 32/64/128-entry 4-way set-associati.ve main TLB.
35 - Set associativity: 2-way, 4-way or direct-mapped.
/openbmc/u-boot/include/dm/
H A Dof_addr.h16 * this walks up the tree and applies the various bus mappings on the way.
21 * that way, but this is traditionally the way IBM at least do things
/openbmc/phosphor-host-ipmid/
H A Dmeson.options135 # IPMI whitelist mechanism is not needed by everyone; offer a way to disable it
153 …description: 'The Entity Manager Decorators flag is enabled by default; offer a way to disable it',
161 description: 'Dynamic sensors stack is enabled by default; offer a way to disable it',
167 description: 'Dynamic sensors stack is enabled by default; offer a way to disable it',
173 description: 'Hybrid sensors stack is disabled by default; offer a way to enable it',
179 description: 'OEM sensor SDR parsing is disabled by default; offer a way to enable it',
187 description: 'Sensor cache stack is disabled by default; offer a way to enable it',
/openbmc/u-boot/examples/api/
H A Dlibgenwrap.c8 * U-Boot's lib in the standalone app. This way way we can re-use
/openbmc/openbmc/meta-openembedded/meta-networking/recipes-connectivity/rdist/rdist-6.1.5/
H A Drdist-6.1.5-oldpath.patch46 The way the old rdist started a server rdist is to run "rdist
49 -/usr/ucb/oldrdist). In this way, you get compatibility with hosts
51 +Hat linux). In this way, you get compatibility with hosts
/openbmc/qemu/linux-user/aarch64/
H A Dmte_user_helper.c24 * as the preferred mode. With this preference, and the way the API in arm_set_mte_tcf0()
25 * uses only two bits, there is no way for the program to select in arm_set_mte_tcf0()
/openbmc/phosphor-virtual-sensor/
H A DREADME.md17 added this way can use any expression that is accepted by exprtk.
31 Sensors added this way can only use a set of restricted calculations. Currently
/openbmc/openbmc/poky/meta/recipes-devtools/rpm/files/
H A D0001-Do-not-add-an-unsatisfiable-dependency-when-building.patch5 a short-circuited way.
8 hand produces rpms that way by design.
/openbmc/qemu/target/xtensa/
H A Dmmu_helper.c24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
87 bool dtlb, uint32_t way) in get_page_size() argument
91 switch (way) { in get_page_size()
107 * Get bit mask for the virtual address bits translated by the TLB way
110 bool dtlb, uint32_t way) in xtensa_tlb_get_addr_mask() argument
117 switch (way) { in xtensa_tlb_get_addr_mask()
119 return 0xfff00000 << get_page_size(env, dtlb, way) * 2; in xtensa_tlb_get_addr_mask()
123 return 0xf8000000 << get_page_size(env, dtlb, way); in xtensa_tlb_get_addr_mask()
130 return 0xf0000000 << (1 - get_page_size(env, dtlb, way)); in xtensa_tlb_get_addr_mask()
147 static uint32_t get_vpn_mask(const CPUXtensaState *env, bool dtlb, uint32_t way) in get_vpn_mask() argument
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/openbmc/qemu/target/ppc/
H A Dmmu_common.c70 int way, int is_code) in ppc6xx_tlb_getnum() argument
74 /* Select TLB num in a way from address */ in ppc6xx_tlb_getnum()
76 /* Select TLB way */ in ppc6xx_tlb_getnum()
77 nr += env->tlb_per_way * way; in ppc6xx_tlb_getnum()
94 int nr, best, way, ret; in ppc6xx_tlb_check() local
101 for (way = 0; way < env->nb_ways; way++) { in ppc6xx_tlb_check()
102 nr = ppc6xx_tlb_getnum(env, eaddr, way, is_code); in ppc6xx_tlb_check()
505 int type, way, entry, i; in mmu6xx_dump_mmu() local
533 for (way = 0; way < env->nb_ways; way++) { in mmu6xx_dump_mmu()
534 for (entry = env->nb_tlb * type + env->tlb_per_way * way; in mmu6xx_dump_mmu()
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/openbmc/openbmc/meta-openembedded/meta-oe/dynamic-layers/meta-python/recipes-dbs/mongodb/mongodb/
H A D0001-Fix-compilation-with-fno-common.patch41 -/* XXX fix me: there is currently no way to locate the dyn-info list
74 -/* XXX fix me: there is currently no way to locate the dyn-info list
102 +/* XXX fix me: there is currently no way to locate the dyn-info list
120 -/* XXX fix me: there is currently no way to locate the dyn-info list
177 -/* XXX fix me: there is currently no way to locate the dyn-info list
266 +/* XXX fix me: there is currently no way to locate the dyn-info list
291 -/* XXX fix me: there is currently no way to locate the dyn-info list
324 -/* XXX fix me: there is currently no way to locate the dyn-info list
357 -/* XXX fix me: there is currently no way to locate the dyn-info list
390 -/* XXX fix me: there is currently no way to locate the dyn-info list
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/openbmc/openbmc/poky/meta/recipes-devtools/rsync/files/
H A Ddetermism.patch9 they sort one way, in C, they sort the other. The sorting order changes
21 in a different way. This patch can be dropped when we upgrade to include:
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Common/Callout/
H A DREADME.md44 The way this inheritance will be implemented is that, Foo's metadata will
63 This way, say an application wants to express an IIC callout in terms of a
66 for Callout.Callout. That way the error handling component can still decipher
/openbmc/openbmc/meta-openembedded/meta-networking/licenses/
H A Dradvd8 way or form.
36 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
/openbmc/u-boot/arch/nds32/include/asm/
H A Dcache.h33 /* I-cache sets (# of cache lines) per way */
39 /* D-cache sets (# of cache lines) per way */

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