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/openbmc/linux/Documentation/devicetree/bindings/power/reset/
H A Datmel,sama5d2-shdwc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/atmel,sama5d2-shdwc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Claudiu Beznea <claudiu.beznea@microchip.com>
14 and VDDCORE and the wake-up detection on debounced input lines.
19 - items:
20 - const: microchip,sama7g5-shdwc
21 - const: syscon
22 - enum:
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dnokia-bluetooth.txt2 ---------------------
8 UART status lines for wakeup of UART transceivers to improve power management
13 - compatible: should contain "nokia,h4p-bluetooth" as well as one of the following:
14 * "brcm,bcm2048-nokia"
15 * "ti,wl1271-bluetooth-nokia"
16 - reset-gpios: GPIO specifier, used to reset the BT module (active low)
17 - bluetooth-wakeup-gpios: GPIO specifier, used to wakeup the BT module (active high)
18 - host-wakeup-gpios: GPIO specifier, used to wakeup the host processor (active high)
19 - clock-names: should be "sysclk"
20 - clocks: should contain a clock specifier for every name in clock-names
[all …]
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dbrcm,brcmstb-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/brcm,brcmstb-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The controller's registers are organized as sets of eight 32-bit
15 - Doug Berger <opendmb@gmail.com>
16 - Florian Fainelli <f.fainelli@gmail.com>
21 - enum:
22 - brcm,bcm7445-gpio
23 - const: brcm,brcmstb-gpio
[all …]
/openbmc/linux/Documentation/devicetree/bindings/rtc/
H A Drtc-omap.txt4 - compatible:
5 - "ti,da830-rtc" - for RTC IP used similar to that on DA8xx SoC family.
6 - "ti,am3352-rtc" - for RTC IP used similar to that on AM335x SoC family.
7 This RTC IP has special WAKE-EN Register to enable
8 Wakeup generation for event Alarm. It can also be
11 - "ti,am4372-rtc" - for RTC IP used similar to that on AM437X SoC family.
12 - reg: Address range of rtc register set
13 - interrupts: rtc timer, alarm interrupts in order
16 - system-power-controller: whether the rtc is controlling the system power
18 - clocks: Any internal or external clocks feeding in to rtc
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/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Drichtek,rtmv20-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
27 wakeup-source: true
32 enable-gpios:
36 richtek,ld-pulse-delay-us:
38 load current pulse delay in microsecond after strobe pin pulse high.
43 richtek,ld-pulse-width-us:
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6-logicpd-baseboard.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 compatible = "gpio-keys";
9 button-0 {
13 debounce-interval = <10>;
14 wakeup-source;
17 button-1 {
21 debounce-interval = <10>;
22 wakeup-source;
25 button-2 {
29 debounce-interval = <10>;
[all …]
H A Dimx6q-var-dt6customboard.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Support for Variscite DART-MX6 Carrier-board
9 /dts-v1/;
12 #include "imx6qdl-var-dart.dtsi"
13 #include <dt-bindings/input/linux-event-codes.h>
16 model = "Variscite DART-MX6 Carrier-board";
20 compatible = "pwm-backlight";
22 brightness-levels = <0 4 8 16 32 64 128 248>;
23 default-brightness-level = <7>;
27 gpio-keys {
[all …]
H A Dimx6sx-sdb.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
13 compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
16 stdout-path = &uart1;
24 backlight_display: backlight-display {
25 compatible = "pwm-backlight";
27 brightness-levels = <0 4 8 16 32 64 128 255>;
28 default-brightness-level = <6>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dimx6-logicpd-baseboard.dtsi5 * This file is dual-licensed: you can use it either under the terms
46 compatible = "gpio-keys";
52 debounce-interval = <10>;
53 wakeup-source;
60 debounce-interval = <10>;
61 wakeup-source;
68 debounce-interval = <10>;
69 wakeup-source;
75 debounce-interval = <10>;
76 wakeup-source;
[all …]
H A Drk3288-veyron-jerry.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "cros-ec-sbs.dtsi"
14 compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
15 "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
16 "google,veyron-jerry-rev3", "google,veyron-jerry",
20 stdout-path = &uart2;
23 panel_regulator: panel-regulator {
24 compatible = "regulator-fixed";
[all …]
H A Dr8a7793-gose.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2015 Renesas Electronics Corporation
9 * SSI-AK4643
36 /dts-v1/;
38 #include <dt-bindings/gpio/gpio.h>
39 #include <dt-bindings/input/input.h>
56 stdout-path = "serial0:115200n8";
64 gpio-keys {
65 compatible = "gpio-keys";
67 key-1 {
[all …]
H A Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
19 regulator-max-microvolt = <900000>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dinterrupts.txt5 -------------------------
8 "interrupts" property, an "interrupts-extended" property, or both. If both are
16 interrupt-parent = <&intc1>;
19 The "interrupt-parent" property is used to specify the controller to which
25 The "interrupts-extended" property is a special form; useful when a node needs
31 interrupts-extended = <&intc1 5 1>, <&intc2 1 0>;
34 -----------------------------
36 A device is marked as an interrupt controller with the "interrupt-controller"
37 property. This is a empty, boolean property. An additional "#interrupt-cells"
45 -----------
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/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt2712-evb.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
14 chassis-type = "embedded";
15 compatible = "mediatek,mt2712-evb", "mediatek,mt2712";
27 stdout-path = "serial0:921600n8";
30 cpus_fixed_vproc0: regulator-vproc-buck0 {
31 compatible = "regulator-fixed";
32 regulator-name = "vproc_buck0";
33 regulator-min-microvolt = <1000000>;
[all …]
H A Dmt8183-kukui-kakadu.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "mt8183-kukui.dtsi"
7 #include <dt-bindings/input/gpio-keys.h>
10 ppvarn_lcd: ppvarn-lcd {
11 compatible = "regulator-fixed";
12 regulator-name = "ppvarn_lcd";
13 pinctrl-names = "default";
14 pinctrl-0 = <&ppvarn_lcd_en>;
16 enable-active-high;
21 ppvarp_lcd: ppvarp-lcd {
[all …]
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-h2-plus-bananapi-m2-zero.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Based on sun8i-h3-bananapi-m2-plus.dts, which is:
6 * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
9 /dts-v1/;
10 #include "sun8i-h3.dtsi"
11 #include "sunxi-common-regulators.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
17 model = "Banana Pi BPI-M2-Zero";
18 compatible = "sinovoip,bpi-m2-zero", "allwinner,sun8i-h2-plus";
[all …]
H A Dsun8i-h3-nanopi-duo2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "sun8i-h3.dtsi"
8 #include "sunxi-common-regulators.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
15 compatible = "friendlyarm,nanopi-duo2", "allwinner,sun8i-h3";
22 stdout-path = "serial0:115200n8";
26 compatible = "gpio-leds";
28 led-0 {
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
19 regulator-max-microvolt = <900000>;
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos4210-trats.dts1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
19 chassis-type = "handset";
37 stdout-path = "serial2:115200n8";
40 vemmc_reg: regulator-0 {
41 compatible = "regulator-fixed";
42 regulator-name = "VMEM_VDD_2.8V";
43 regulator-min-microvolt = <2800000>;
44 regulator-max-microvolt = <2800000>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dbeacon-renesom-baseboard.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/clock/versaclock.h>
11 backlight_lvds: backlight-lvds {
12 compatible = "pwm-backlight";
13 power-supply = <&reg_lcd>;
14 enable-gpios = <&gpio_exp1 3 GPIO_ACTIVE_HIGH>;
16 brightness-levels = <0 4 8 16 32 64 128 255>;
17 default-brightness-level = <6>;
[all …]
/openbmc/linux/drivers/media/rc/
H A Dite-cir.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 #define ITE_DRIVER_NAME "ite-cir"
34 /* hw-specific operation function pointers; most of these must be
92 /* tx high carrier frequency, in Hz, 0 means no demodulation */
98 /* duty cycle, 0-100 */
114 /* low-speed carrier frequency limits (Hz) */
118 /* high-speed carrier frequency limits (Hz) */
130 * n in RDCR produces a tolerance of +/- n * 6.25% around the center
133 * From two limit frequencies, L (low) and H (high), we can get both the
135 * frequency A = (H - L) / (H + L). We can use this in order to honor the
[all …]
/openbmc/linux/arch/arm/boot/dts/renesas/
H A Dr8a7793-gose.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2015 Renesas Electronics Corporation
9 * SSI-AK4643
36 /dts-v1/;
38 #include <dt-bindings/gpio/gpio.h>
39 #include <dt-bindings/input/input.h>
59 stdout-path = "serial0:115200n8";
68 compatible = "gpio-keys";
70 pinctrl-0 = <&keyboard_pins>;
71 pinctrl-names = "default";
[all …]
/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra234-p3768-0000+p3767-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra234-p3767-0000.dtsi"
8 #include "tegra234-p3768-0000.dtsi"
11 compatible = "nvidia,p3768-0000+p3767-0000", "nvidia,p3767-0000", "nvidia,tegra234";
21 stdout-path = "serial0:115200n8";
26 compatible = "nvidia,tegra194-hsuart";
27 reset-names = "serial";
[all …]
/openbmc/linux/Documentation/driver-api/gpio/
H A Dintro.rst16 - The descriptor-based interface is the preferred way to manipulate GPIOs,
18 - The legacy integer-based interface which is considered deprecated (but still
21 The remainder of this document applies to the new descriptor-based interface.
23 integer-based interface.
29 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
37 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
38 non-dedicated pin can be configured as a GPIO; and most chips have at least
43 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
48 - Output values are writable (high=1, low=0). Some chips also have
50 value might be driven, supporting "wire-OR" and similar schemes for the
[all …]
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-transformer-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
8 #include "tegra30-cpu-opp.dtsi"
9 #include "tegra30-cpu-opp-microvolt.dtsi"
12 chassis-type = "convertible";
31 * pre-existing /chosen node to be available to insert the
37 trusted-foundations {
38 compatible = "tlm,trusted-foundations";
[all …]

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