/openbmc/linux/fs/ |
H A D | fs_pin.c | 1 // SPDX-License-Identifier: GPL-2.0 10 void pin_remove(struct fs_pin *pin) in pin_remove() argument 13 hlist_del_init(&pin->m_list); in pin_remove() 14 hlist_del_init(&pin->s_list); in pin_remove() 16 spin_lock_irq(&pin->wait.lock); in pin_remove() 17 pin->done = 1; in pin_remove() 18 wake_up_locked(&pin->wait); in pin_remove() 19 spin_unlock_irq(&pin->wait.lock); in pin_remove() 22 void pin_insert(struct fs_pin *pin, struct vfsmount *m) in pin_insert() argument 25 hlist_add_head(&pin->s_list, &m->mnt_sb->s_pins); in pin_insert() [all …]
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/openbmc/linux/drivers/media/cec/core/ |
H A D | cec-pin-priv.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * cec-pin-priv.h - internal cec-pin header 13 #include <media/cec-pin.h> 15 #define call_pin_op(pin, op, arg...) \ argument 16 ((pin && pin->ops->op && !pin->adap->devnode.unregistered) ? \ 17 pin->ops->op(pin->adap, ## arg) : 0) 19 #define call_void_pin_op(pin, op, arg...) \ argument 21 if (pin && pin->ops->op && \ 22 !pin->adap->devnode.unregistered) \ 23 pin->ops->op(pin->adap, ## arg); \ [all …]
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H A D | cec-pin.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #include <media/cec-pin.h> 11 #include "cec-pin-priv.h" 61 /* Data bits are 0-7, EOM is bit 8 and ACK is bit 9 */ 73 { "Tx Wait", CEC_TIM_SAMPLE }, 74 { "Tx Wait for High", CEC_TIM_IDLE_SAMPLE }, 76 { "Tx Start Bit High", CEC_TIM_START_BIT_TOTAL - CEC_TIM_START_BIT_LOW }, 77 { "Tx Start Bit High Short", CEC_TIM_START_BIT_TOTAL_SHORT - CEC_TIM_START_BIT_LOW }, 78 { "Tx Start Bit High Long", CEC_TIM_START_BIT_TOTAL_LONG - CEC_TIM_START_BIT_LOW }, 82 { "Tx Data 0 High", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_0_LOW }, [all …]
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H A D | cec-api.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * cec-api.c - HDMI Consumer Electronics Control framework - API 21 #include <media/cec-pin.h> 22 #include "cec-priv.h" 23 #include "cec-pin-priv.h" 27 struct cec_fh *fh = filp->private_data; in cec_devnode_data() 29 return &fh->adap->devnode; in cec_devnode_data() 37 struct cec_fh *fh = filp->private_data; in cec_poll() 38 struct cec_adapter *adap = fh->adap; in cec_poll() 41 poll_wait(filp, &fh->wait, poll); in cec_poll() [all …]
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/openbmc/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5250-snow-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/maxim,max77686.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/sound/samsung-i2s.h> 30 stdout-path = "serial3:115200n8"; 33 gpio-keys { 34 compatible = "gpio-keys"; 35 pinctrl-names = "default"; [all …]
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/openbmc/linux/rust/kernel/sync/ |
H A D | condvar.rs | 1 // SPDX-License-Identifier: GPL-2.0 13 /// Creates a [`CondVar`] initialiser with the given name and a newly-created lock class. 42 /// #[pin] 45 /// #[pin] 64 /// fn new_example() -> Result<Pin<Box<Example>>> { 66 /// value <- new_mutex!(0), 67 /// value_changed <- new_condvar!(), 72 /// [`struct wait_queue_head`]: ../../../include/linux/wait.h 75 #[pin] 79 /// self-referential, so it cannot be safely moved once it is initialised. [all …]
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | lantiq,pinctrl-xway.txt | 4 - compatible: "lantiq,<chip>-pinctrl", where <chip> is: 10 - reg: Should contain the physical address and length of the gpio/pinmux 13 Please refer to pinctrl-bindings.txt in this directory for details of the 15 phrase "pin configuration node". 17 Lantiq's pin configuration nodes act as a container for an arbitrary number of 19 pin, a group, or a list of pins or groups. This configuration can include the 20 mux function to select on those group(s), and two pin configuration parameters: 21 pull-up and open-drain 27 other words, a subnode that lists a mux function but no pin configuration 28 parameters implies no information about any pin configuration parameters. [all …]
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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | ti,gpmc-child.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 24 gpmc,sync-clk-ps: 28 # Chip-select signal timings corresponding to GPMC_CONFIG2: 29 gpmc,cs-on-ns: 33 gpmc,cs-rd-off-ns: [all …]
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H A D | ti,gpmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 16 - Asynchronous SRAM-like memories and ASICs 17 - Asynchronous, synchronous, and page mode burst NOR flash 18 - NAND flash 19 - Pseudo-SRAM devices [all …]
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/openbmc/linux/drivers/md/bcache/ |
H A D | journal.c | 1 // SPDX-License-Identifier: GPL-2.0 20 * entries (same as garbage collection would), then we replay them - reinserting 30 struct closure *cl = bio->bi_private; in journal_read_endio() 38 struct journal_device *ja = &ca->journal; in journal_read_bucket() 39 struct bio *bio = &ja->bio; in journal_read_bucket() 42 struct jset *j, *data = ca->set->journal.w[0].data; in journal_read_bucket() 46 sector_t bucket = bucket_to_sector(ca->set, ca->sb.d[bucket_index]); in journal_read_bucket() 52 while (offset < ca->sb.bucket_size) { in journal_read_bucket() 53 reread: left = ca->sb.bucket_size - offset; in journal_read_bucket() 56 bio_reset(bio, ca->bdev, REQ_OP_READ); in journal_read_bucket() [all …]
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H A D | journal.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 8 * The journal is treated as a circular buffer of buckets - a journal entry 16 * superblock - all the things that are frequently updated. This is for future 22 * Currently, we don't journal BTREE_REPLACE operations - this will hopefully be 23 * fixed eventually. This isn't a bug - BTREE_REPLACE is used for insertions 32 * journal entry still open - i.e. that has keys that haven't been flushed to 38 * zero, we pop it off - thus, the size of the fifo tells us the number of open 48 * might contain keys for many journal entries - we handle this by making sure 56 * last_seq - the oldest journal entry we still need. We write last_seq in each 61 * newest journal entry it contains - if we don't need that journal entry we [all …]
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/openbmc/linux/tools/testing/selftests/mm/ |
H A D | cow.c | 1 // SPDX-License-Identifier: GPL-2.0-only 21 #include <sys/wait.h> 68 for (; size; addr += pagesize, size -= pagesize) in range_is_swapped() 81 if (pipe(comm_pipes->child_ready) < 0) in setup_comm_pipes() 82 return -errno; in setup_comm_pipes() 83 if (pipe(comm_pipes->parent_ready) < 0) { in setup_comm_pipes() 84 close(comm_pipes->child_ready[0]); in setup_comm_pipes() 85 close(comm_pipes->child_ready[1]); in setup_comm_pipes() 86 return -errno; in setup_comm_pipes() 94 close(comm_pipes->child_ready[0]); in close_comm_pipes() [all …]
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/openbmc/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_gmbus.c | 3 * Copyright © 2006-2008,2010 Intel Corporation 27 * Chris Wilson <chris@chris-wilson.co.uk> 31 #include <linux/i2c-algo-bit.h> 77 /* Map gmbus pin pairs to names and registers. */ 153 unsigned int pin) in get_gmbus_pin() argument 187 if (pin >= size || !pins[pin].name) in get_gmbus_pin() 190 return &pins[pin]; in get_gmbus_pin() 193 bool intel_gmbus_is_valid_pin(struct drm_i915_private *i915, unsigned int pin) in intel_gmbus_is_valid_pin() argument 195 return get_gmbus_pin(i915, pin); in intel_gmbus_is_valid_pin() 239 struct drm_i915_private *i915 = bus->i915; in get_reserved() [all …]
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/openbmc/u-boot/board/mpr2/ |
H A D | mpr2.c | 1 // SPDX-License-Identifier: GPL-2.0+ 25 /* CS2: Ethernet (0xA8000000 - 0xABFFFFFF) */ in board_init() 27 __raw_writel(0x000003c0, CS2WCR); /* (WR:8), no ext. wait */ in board_init() 29 /* CS4: CAN1 (0xB0000000 - 0xB3FFFFFF) */ in board_init() 31 __raw_writel(0x00100981, CS4WCR); /* (SW:1.5 WR:3 HW:1.5), ext. wait */ in board_init() 33 /* CS5a: CAN2 (0xB4000000 - 0xB5FFFFFF) */ in board_init() 35 __raw_writel(0x00100981, CS5AWCR); /* (SW:1.5 WR:3 HW:1.5), ext. wait */ in board_init() 37 /* CS5b: CAN3 (0xB6000000 - 0xB7FFFFFF) */ in board_init() 39 __raw_writel(0x00100981, CS5BWCR); /* (SW:1.5 WR:3 HW:1.5), ext. wait */ in board_init() 41 /* CS6a: Rotary (0xB8000000 - 0xB9FFFFFF) */ in board_init() [all …]
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/openbmc/linux/drivers/mtd/nand/raw/ |
H A D | nand_legacy.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * 2002-2006 Thomas Gleixner (tglx@linutronix.de) 23 * nand_read_byte - [DEFAULT] read one byte from the chip 30 return readb(chip->legacy.IO_ADDR_R); in nand_read_byte() 34 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip 42 return (uint8_t) cpu_to_le16(readw(chip->legacy.IO_ADDR_R)); in nand_read_byte16() 46 * nand_select_chip - [DEFAULT] control CE line 48 * @chipnr: chipnumber to select, -1 for deselect 55 case -1: in nand_select_chip() 56 chip->legacy.cmd_ctrl(chip, NAND_CMD_NONE, in nand_select_chip() [all …]
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/openbmc/linux/fs/xfs/ |
H A D | xfs_dquot_item.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2000-2003 Silicon Graphics, Inc. 55 qlf->qlf_type = XFS_LI_DQUOT; in xfs_qm_dquot_logitem_format() 56 qlf->qlf_size = 2; in xfs_qm_dquot_logitem_format() 57 qlf->qlf_id = qlip->qli_dquot->q_id; in xfs_qm_dquot_logitem_format() 58 qlf->qlf_blkn in xfs_qm_dquot_logitem_format() [all...] |
/openbmc/u-boot/arch/m68k/cpu/mcf52x2/ |
H A D | cpu.c | 1 // SPDX-License-Identifier: GPL-2.0+ 8 * BuS Elektronik GmbH & Co. KG <esw@bus-elektronik.de> 11 * Copyright (C) 2008 Arthur Shipkowski (art@videon-central.com) 33 out_8(&rcm->rcr, RCM_RCR_SOFTRST); in do_reset() 46 strmhz(buf1, gd->cpu_clk), in print_cpuinfo() 47 strmhz(buf2, gd->bus_clk)); in print_cpuinfo() 58 out_be16(&wdt->sr, 0x5555); in watchdog_reset() 59 out_be16(&wdt->sr, 0xaaaa); in watchdog_reset() 67 out_be16(&wdt->sr, 0x5555); in watchdog_disable() 68 out_be16(&wdt->sr, 0xaaaa); in watchdog_disable() [all …]
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/openbmc/linux/include/uapi/linux/ |
H A D | serial.h | 1 /* SPDX-License-Identifier: GPL-1.0+ WITH Linux-syscall-note */ 32 unsigned short closing_wait; /* time to wait before closing */ 41 * For the close wait times, 0 means wait forever for serial port to 42 * flush its output. 65535 means don't wait at all. 63 #define PORT_RSA 13 /* RSA-DV II/S card */ 82 * Multiport serial configuration structure --- external structure 99 * Serial input interrupt line counters -- external structure 111 * struct serial_rs485 - serial interface for controlling RS485 settings. 132 * * %SER_RS485_ENABLED - RS485 enabled. 133 * * %SER_RS485_RTS_ON_SEND - Logical level for RTS pin when sending. [all …]
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/openbmc/u-boot/drivers/fpga/ |
H A D | spartan2.c | 1 // SPDX-License-Identifier: GPL-2.0+ 7 #include <common.h> /* core U-Boot definitions */ 8 #include <spartan2.h> /* Spartan-II device family */ 41 /* ------------------------------------------------------------------------- */ 42 /* Spartan-II Generic Implementation */ 48 switch (desc->iface) { in spartan2_load() 61 __FUNCTION__, desc->iface); in spartan2_load() 71 switch (desc->iface) { in spartan2_dump() 84 __FUNCTION__, desc->iface); in spartan2_dump() 96 /* ------------------------------------------------------------------------- */ [all …]
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H A D | spartan3.c | 1 // SPDX-License-Identifier: GPL-2.0+ 12 #include <common.h> /* core U-Boot definitions */ 13 #include <spartan3.h> /* Spartan-II device family */ 45 /* ------------------------------------------------------------------------- */ 46 /* Spartan-II Generic Implementation */ 52 switch (desc->iface) { in spartan3_load() 65 __FUNCTION__, desc->iface); in spartan3_load() 75 switch (desc->iface) { in spartan3_dump() 88 __FUNCTION__, desc->iface); in spartan3_dump() 100 /* ------------------------------------------------------------------------- */ [all …]
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/openbmc/linux/drivers/fpga/ |
H A D | xilinx-spi.c | 1 // SPDX-License-Identifier: GPL-2.0-only 15 #include <linux/fpga/fpga-mgr.h> 32 struct xilinx_spi_conf *conf = mgr->priv; in get_done_gpio() 35 ret = gpiod_get_value(conf->done); in get_done_gpio() 38 dev_err(&mgr->dev, "Error reading DONE (%d)\n", ret); in get_done_gpio() 52 * wait_for_init_b - wait for the INIT_B pin to have a given state, or wait 53 * a given delay if the pin is unavailable 56 * @value: Value INIT_B to wait for (1 = asserted = low) 57 * @alt_udelay: Delay to wait if the INIT_B GPIO is not available 59 * Returns 0 when the INIT_B GPIO reached the given state or -ETIMEDOUT if [all …]
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/openbmc/linux/Documentation/devicetree/bindings/sound/ |
H A D | cirrus,cs42l42.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - patches@opensource.cirrus.com 13 The CS42L42 is a low-power audio codec designed for portable applications. 14 It provides a high-dynamic range, stereo DAC for audio playback and a mono 15 high-dynamic-range ADC for audio capture. There is an integrated headset 21 - cirrus,cs42l42 22 - cirrus,cs42l83 29 VP-supply: [all …]
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/openbmc/linux/include/sound/ |
H A D | soc-jack.h | 1 /* SPDX-License-Identifier: GPL-2.0 3 * soc-jack.h 12 * struct snd_soc_jack_pin - Describes a pin to update based on jack detection 14 * @pin: name of the pin to update 16 * @invert: if non-zero then pin is enabled when status is not reported 21 const char *pin; member 27 * struct snd_soc_jack_zone - Describes voltage zones of jack detection 32 * @debounce_time: debounce_time for jack, codec driver should wait for this 45 * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection
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/openbmc/u-boot/include/ |
H A D | lattice.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 3 * Porting to U-Boot: 73 * Pin opcodes. 77 #define signalENABLE 0x1C /* ispENABLE pin. */ 78 #define signalTMS 0x1D /* TMS pin. */ 79 #define signalTCK 0x1E /* TCK pin. */ 80 #define signalTDI 0x1F /* TDI pin. */ 81 #define signalTRST 0x20 /* TRST pin. */ 105 #define TRST 0x05 /* Assert the TRST pin. */ 116 #define ispEN 0x0A /* Assert the ispEN pin. */ [all …]
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/openbmc/linux/drivers/input/touchscreen/ |
H A D | wm9712.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * wm9712.c -- Codec driver for Wolfson WM9712 AC97 Codecs. 87 MODULE_PARM_DESC(five_wire, "Set to '1' to use 5-wire touchscreen."); 94 * order to minimise this, a signal may be applied to the MASK pin to delay or 98 * 1 = High on pin stops conversions 99 * 2 = Edge triggered, edge on pin delays conversion by delay param (above) 100 * 3 = Edge triggered, edge on pin starts conversion after delay param 160 dev_dbg(wm->dev, "setting pen detect pull-up to %d Ohms\n", in wm9712_phy_init() 167 dev_dbg(wm->dev, "setting 5-wire touchscreen mode.\n"); in wm9712_phy_init() 170 dev_warn(wm->dev, "pressure measurement is not " in wm9712_phy_init() [all …]
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