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/openbmc/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,admv1013.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/frequency/adi,admv1013.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
14 radio designs operating in the 24 GHz to 44 GHz frequency range.
21 - adi,admv1013
26 spi-max-frequency:
34 clock-names:
36 - const: lo_in
[all …]
H A Dadi,admv1014.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/frequency/adi,admv1014.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
14 radio designs operating in the 24 GHz to 44 GHz frequency range.
21 - adi,admv1014
26 spi-max-frequency:
32 clock-names:
34 - const: lo_in
[all …]
/openbmc/linux/drivers/cpufreq/
H A Dpmac64-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 * and Markus Demleitner <msdemlei@cl.uni-heidelberg.de>
73 * the various frequencies, retrieved from the device-tree
93 * SMU based voltage switching for Neo2 platforms
108 * Platform function based voltage/vdnap switching for Neo2
145 * SCOM based frequency switching for 970FX rev3
152 /* If frequency is going up, first ramp up the voltage */ in g5_scom_switch_freq()
182 /* If frequency is going down, last ramp the voltage */ in g5_scom_switch_freq()
187 ppc_proc_freq = g5_cpu_freqs[speed_mode].frequency * 1000ul; in g5_scom_switch_freq()
[all …]
H A De_powersaver.c1 // SPDX-License-Identifier: GPL-2.0-only
61 return -ENOMEM; in eps_acpi_init()
63 if (!zalloc_cpumask_var(&eps_acpi_cpu_perf->shared_cpu_map, in eps_acpi_init()
67 return -ENOMEM; in eps_acpi_init()
71 free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map); in eps_acpi_init()
74 return -EIO; in eps_acpi_init()
83 free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map); in eps_acpi_exit()
102 /* Return current frequency */ in eps_get()
104 return centaur->fsb * ((lo >> 8) & 0xff); in eps_get()
122 return -ENODEV; in eps_set_state()
[all …]
H A Dlonghaul.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * (C) 2001-2004 Dave Jones.
12 * LONGHAUL MSR for purpose of both frequency and voltage scaling.
13 * Present in Samuel 2 (steppings 1-7 only) (C5B), and Ezra (C5C).
16 * It is present in Ezra-T (C5M), Nehemiah (C5X) and above.
146 /* Change frequency on next halt or sleep */ in do_longhaul1()
168 /* Setup new frequency */ in do_powersaver()
175 /* Setup new voltage */ in do_powersaver()
180 /* Raise voltage if necessary */ in do_powersaver()
184 /* Change voltage */ in do_powersaver()
[all …]
H A Dspeedstep-centrino.c1 // SPDX-License-Identifier: GPL-2.0-only
33 #define MAINTAINER "linux-pm@vger.kernel.org"
69 struct cpufreq_frequency_table *op_points; /* clock/voltage pairs */
83 frequency/voltage operating point; frequency in MHz, volts in mV.
87 .frequency = (mhz) * 1000, \
88 .driver_data = (((mhz)/100) << 8) | ((mv - 700) / 16) \
92 * These voltage tables were derived from the Intel Pentium M
98 /* Ultra Low Voltage Intel Pentium M processor 900MHz (Banias) */
104 { .frequency = CPUFREQ_TABLE_END }
107 /* Ultra Low Voltage Intel Pentium M processor 1000MHz (Banias) */
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H A Darmada-37xx-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0+
3 * CPU frequency scaling support for Armada 37xx platform.
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
24 #include "cpufreq-dt.h"
77 /* AVS value for the corresponding voltage (in mV) */
124 pr_err("Unsupported CPU frequency %d MHz\n", freq/1000000); in armada_37xx_cpu_freq_info_get()
166 * Set cpu divider based on the pre-computed array in in armada37xx_cpufreq_dvfs_setup()
186 * Find out the armada 37x supported AVS value whose voltage value is
187 * the round-up closest to the target voltage value.
193 /* Find out the round-up closest supported voltage value */ in armada_37xx_avs_val_match()
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H A Dpmac32-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
41 * init/main.c to make it non-init before enabling DEBUG_FREQ
60 * Different models uses different mechanisms to switch the frequency
75 /* There are only two frequency states for each processor. Values
115 /* ramping up, set voltage first */ in cpu_750fx_cpu_speed()
120 /* tweak L2 for high voltage */ in cpu_750fx_cpu_speed()
131 /* tweak L2 for low voltage */ in cpu_750fx_cpu_speed()
138 /* ramping down, set voltage last */ in cpu_750fx_cpu_speed()
158 /* ramping up, set voltage first */ in dfs_set_cpu_speed()
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/openbmc/bmcweb/redfish-core/include/registries/
H A Dpower_message_registry.hpp4 * This is an auto-generated header which contains definitions
16 // clang-format off
292 …"Indicates that a frequency reading is no longer below the lower critical threshold but is still o…
293 …"Frequency '%1' reading of %2 hertz is now above the %3 lower critical threshold but remains outsi…
306 "Indicates that a frequency reading is above the upper caution threshold.",
307 "Frequency '%1' reading of %2 hertz is above the %3 upper caution threshold.",
320 "Indicates that a frequency reading is above the upper critical threshold.",
321 "Frequency '%1' reading of %2 hertz is above the %3 upper critical threshold.",
334 "Indicates that a frequency reading is below the lower caution threshold.",
335 "Frequency '%1' reading of %2 hertz is below the %3 lower caution threshold.",
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/openbmc/linux/drivers/memory/samsung/
H A Dexynos5422-dmc.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/devfreq-event.h>
100 * struct dmc_opp_table - Operating level desciption
101 * @freq_hz: target frequency in Hz
102 * @volt_uv: target voltage in uV
104 * Covers frequency and voltage settings of the DMC operating mode.
112 * struct exynos5_dmc - main structure describing DMC device
119 * @lock: protects curr_rate and frequency/voltage setting section
120 * @curr_rate: current frequency
121 * @curr_volt: current voltage
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/openbmc/linux/Documentation/power/
H A Dopp.rst5 (C) 2009-2010 Nishanth Menon <nm@ti.com>, Texas Instruments Incorporated
20 -------------------------------------------------
22 Complex SoCs of today consists of a multiple sub-modules working in conjunction.
24 need to function at their highest performing frequency all the time. To
25 facilitate this, sub-modules in a SoC are grouped into domains, allowing some
26 domains to run at lower voltage and frequency while other domains run at
27 voltage/frequency pairs that are higher.
29 The set of discrete tuples consisting of frequency and voltage pairs that
36 {300MHz at minimum voltage of 1V}, {800MHz at minimum voltage of 1.2V},
37 {1GHz at minimum voltage of 1.3V}
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/openbmc/linux/Documentation/devicetree/bindings/media/i2c/
H A Daptina,mt9p031.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Aptina 1/2.5-Inch 5Mp CMOS Digital Image Sensor
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
13 The Aptina MT9P031 is a 1/2.5-inch CMOS active pixel digital image sensor
15 simple two-wire serial interface.
20 - aptina,mt9p006
21 - aptina,mt9p031
22 - aptina,mt9p031m
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H A Dovti,ov02a10.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Dongchun Zhu <dongchun.zhu@mediatek.com>
13 description: |-
14 The Omnivision OV02A10 is a low-cost, high performance, 1/5-inch, 2 megapixel
17 @ 1600x1200 (UXGA) resolution transferred over a 1-lane MIPI interface. The
18 sensor output is available via CSI-2 serial data output.
21 - $ref: /schemas/media/video-interface-devices.yaml#
33 clock-names:
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/openbmc/linux/arch/arm/mach-omap2/
H A Domap_opp_data.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2009-2010 Texas Instruments Incorporated - https://www.ti.com/
16 #include "voltage.h"
25 * struct omap_opp_def - OMAP OPP Definition
27 * @freq: Frequency in hertz corresponding to this OPP
28 * @u_volt: Nominal voltage in microvolts corresponding to this OPP
29 * @default_available: True/false - is this OPP available by default
31 * OMAP SOCs have a standard set of tuples consisting of frequency and voltage
32 * pairs that the device will support per voltage domain. This is called
35 * domain, you can have a set of {frequency, voltage} pairs and this is denoted
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A Duncore-power.json78 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
86 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
94 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
102 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
110 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
118 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
126 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
134 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
138 "BriefDescription": "Frequency Residency",
142 …frequency greater than or equal to the frequency that is configured in the filter. One can use al…
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,wcd934x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9340/WCD9341 Codec is a standalone Hi-Fi audio codec IC.
14 It has in-built Soundwire controller, pin controller, interrupt mux and
27 reset-gpios:
31 slim-ifc-dev:
38 clock-names:
41 vdd-buck-supply:
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H A Dcs42l56.txt5 - compatible : "cirrus,cs42l56"
7 - reg : the I2C address of the device for I2C
9 - VA-supply, VCP-supply, VLDO-supply : power supplies for the device,
14 - cirrus,gpio-nreset : GPIO controller's phandle and the number
17 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
19 register, not the actual frequency. The frequency is determined by the following.
20 Frequency = MCLK / 4 * (N+2)
22 MCLK = Where MCLK is the frequency of the mclk signal after the MCLKDIV2 circuit.
24 - cirrus,ain1a-ref-cfg, ain1b-ref-cfg : boolean, If present, AIN1A or AIN1B are configured
25 as a pseudo-differential input referenced to AIN1REF/AIN3A.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dfsl-esdhc.txt7 by mmc.txt and the properties used by the sdhci-esdhc driver.
10 - compatible : should be "fsl,esdhc", or "fsl,<chip>-esdhc".
12 "fsl,mpc8536-esdhc"
13 "fsl,mpc8378-esdhc"
14 "fsl,p2020-esdhc"
15 "fsl,p4080-esdhc"
16 "fsl,t1040-esdhc"
17 "fsl,t4240-esdhc"
19 "fsl,ls1012a-esdhc"
20 "fsl,ls1028a-esdhc"
[all …]
H A Dmmc-spi-slot.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-spi-slot.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 - $ref: mmc-controller.yaml
14 - $ref: /schemas/spi/spi-peripheral-props.yaml
21 const: mmc-spi-slot
29 voltage-ranges:
30 $ref: /schemas/types.yaml#/definitions/uint32-array
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dgm20b.c89 #define DFS_DET_RANGE 6 /* -2^6 ... 2^6-1 */
90 #define SDM_DIN_RANGE 12 /* -2^12 ... 2^12-1 */
99 .coeff_slope = -165230,
136 /* safe frequency we can use at minimum voltage */
162 struct nvkm_subdev *subdev = &clk->base.base.subdev; in gm20b_pllg_read_mnp()
163 struct nvkm_device *device = subdev->device; in gm20b_pllg_read_mnp()
166 gk20a_pllg_read_mnp(&clk->base, &pll->base); in gm20b_pllg_read_mnp()
168 pll->sdm_din = (val >> GPCPLL_CFG2_SDM_DIN_SHIFT) & in gm20b_pllg_read_mnp()
175 struct nvkm_device *device = clk->base.base.subdev.device; in gm20b_pllg_write_mnp()
178 pll->sdm_din << GPCPLL_CFG2_SDM_DIN_SHIFT); in gm20b_pllg_write_mnp()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v1.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <viresh.kumar@linaro.org>
13 Devices work at voltage-current-frequency combinations and some implementations
19 This binding only supports voltage-frequency pairs.
24 operating-points:
25 $ref: /schemas/types.yaml#/definitions/uint32-matrix
28 - description: Frequency in kHz
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28-cfa10049.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10049 is an expansion board for the CFA-10036 module, thus we
8 * need to include the CFA-10036 DTS.
10 #include "imx28-cfa10036.dts"
13 model = "Crystalfontz CFA-10049 Board";
17 compatible = "i2c-mux-gpio";
18 #address-cells = <1>;
19 #size-cells = <0>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&i2cmux_pins_cfa10049>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dmps,mp886x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Monolithic Power Systems MP8867/MP8869 voltage regulator
10 - Jisheng Zhang <jszhang@kernel.org>
13 - $ref: regulator.yaml#
18 - mps,mp8867
19 - mps,mp8869
24 enable-gpios:
28 mps,fb-voltage-divider:
[all …]
/openbmc/linux/drivers/thermal/
H A Ddevfreq_cooling.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2014-2015 ARM Limited
9 * - If OPPs are added or removed after devfreq cooling has
28 * struct devfreq_cooling_device - Devfreq cooling device
46 * @req_max_freq: PM QoS request for limiting the maximum frequency
67 struct devfreq_cooling_device *dfc = cdev->devdata; in devfreq_cooling_get_max_state()
69 *state = dfc->max_state; in devfreq_cooling_get_max_state()
77 struct devfreq_cooling_device *dfc = cdev->devdata; in devfreq_cooling_get_cur_state()
79 *state = dfc->cooling_state; in devfreq_cooling_get_cur_state()
87 struct devfreq_cooling_device *dfc = cdev->devdata; in devfreq_cooling_set_cur_state()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dmotorcomm,yt8xxx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Sae <frank.sae@motor-comm.com>
13 - $ref: ethernet-phy.yaml#
18 - ethernet-phy-id4f51.e91a
19 - ethernet-phy-id4f51.e91b
21 rx-internal-delay-ps:
24 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
30 tx-internal-delay-ps:
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