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/openbmc/linux/drivers/gpu/drm/omapdrm/dss/
H A Dvenc.c6 * VENC settings from TI's DSS driver
9 #define DSS_SUBSYS_NAME "VENC"
33 /* Venc registers */
268 static inline void venc_write_reg(struct venc_device *venc, int idx, u32 val) in venc_write_reg() argument
270 __raw_writel(val, venc->base + idx); in venc_write_reg()
273 static inline u32 venc_read_reg(struct venc_device *venc, int idx) in venc_read_reg() argument
275 u32 l = __raw_readl(venc->base + idx); in venc_read_reg()
279 static void venc_write_config(struct venc_device *venc, in venc_write_config() argument
282 DSSDBG("write venc conf\n"); in venc_write_config()
284 venc_write_reg(venc, VENC_LLEN, config->llen); in venc_write_config()
[all …]
/openbmc/linux/drivers/media/platform/amphion/
H A Dvenc.c179 struct venc_t *venc = inst->priv; in venc_g_fmt() local
197 f->fmt.pix_mp.colorspace = venc->params.color.primaries; in venc_g_fmt()
198 f->fmt.pix_mp.xfer_func = venc->params.color.transfer; in venc_g_fmt()
199 f->fmt.pix_mp.ycbcr_enc = venc->params.color.matrix; in venc_g_fmt()
200 f->fmt.pix_mp.quantization = venc->params.color.full_range; in venc_g_fmt()
221 struct venc_t *venc = inst->priv; in venc_s_fmt() local
238 venc->params.input_format = cur_fmt->pixfmt; in venc_s_fmt()
239 venc->params.src_stride = cur_fmt->bytesperline[0]; in venc_s_fmt()
240 venc->params.src_width = cur_fmt->width; in venc_s_fmt()
241 venc->params.src_height = cur_fmt->height; in venc_s_fmt()
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H A DMakefile17 venc.o \
/openbmc/u-boot/drivers/video/
H A Domap3_dss.c33 /* Configure VENC for a given Mode (NTSC / PAL) */
37 struct venc_regs *venc = (struct venc_regs *) OMAP3_VENC_BASE; in omap3_dss_venc_config() local
41 writel(venc_cfg->status, &venc->status); in omap3_dss_venc_config()
42 writel(venc_cfg->f_control, &venc->f_control); in omap3_dss_venc_config()
43 writel(venc_cfg->vidout_ctrl, &venc->vidout_ctrl); in omap3_dss_venc_config()
44 writel(venc_cfg->sync_ctrl, &venc->sync_ctrl); in omap3_dss_venc_config()
45 writel(venc_cfg->llen, &venc->llen); in omap3_dss_venc_config()
46 writel(venc_cfg->flens, &venc->flens); in omap3_dss_venc_config()
47 writel(venc_cfg->hfltr_ctrl, &venc->hfltr_ctrl); in omap3_dss_venc_config()
48 writel(venc_cfg->cc_carr_wss_carr, &venc->cc_carr_wss_carr); in omap3_dss_venc_config()
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/openbmc/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dvenc.c3 * linux/drivers/video/omap2/dss/venc.c
8 * VENC settings from TI's DSS driver
11 #define DSS_SUBSYS_NAME "VENC"
34 /* Venc registers */
256 } venc; variable
260 __raw_writel(val, venc.base + idx); in venc_write_reg()
265 u32 l = __raw_readl(venc.base + idx); in venc_read_reg()
271 DSSDBG("write venc conf\n"); in venc_write_config()
284 venc.wss_data); in venc_write_config()
332 DSSERR("Failed to reset venc\n"); in venc_reset()
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H A DKconfig43 bool "VENC support"
103 bool "Sleep 20ms after VENC reset"
106 There is a 20ms sleep after VENC reset which seemed to fix the
/openbmc/linux/drivers/gpu/drm/meson/
H A Dmeson_encoder_hdmi.c80 /* For 420, pixel clock is half unlike venc clock */ in meson_encoder_hdmi_set_vclk()
100 /* VENC double pixels for 1080i, 720p and YUV420 modes */ in meson_encoder_hdmi_set_vclk()
110 dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n", in meson_encoder_hdmi_set_vclk()
112 priv->venc.hdmi_use_enci); in meson_encoder_hdmi_set_vclk()
115 venc_freq, hdmi_freq, priv->venc.hdmi_use_enci); in meson_encoder_hdmi_set_vclk()
154 /* For 420, pixel clock is half unlike venc clock */ in meson_encoder_hdmi_mode_valid()
170 /* VENC double pixels for 1080i, 720p and YUV420 modes */ in meson_encoder_hdmi_mode_valid()
182 dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n", in meson_encoder_hdmi_mode_valid()
226 /* VENC + VENC-DVI Mode setup */ in meson_encoder_hdmi_atomic_enable()
244 dev_dbg(priv->dev, "%s\n", priv->venc.hdmi_use_enci ? "VENCI" : "VENCP"); in meson_encoder_hdmi_atomic_enable()
[all …]
H A Dmeson_dw_hdmi.c64 * Pixel data arrives in 4:4:4 format from the VENC
69 * The VENC uses a DVI encoder on top of the ENCI
82 * - VENC & HDMI Clock setup for 480i to 1080p60
83 * - VENC Mode setup for 480i to 1080p60
299 /* For 420, pixel clock is half unlike venc clock */ in meson_hdmi_phy_setup_mode()
424 /* Temporary Disable VENC video stream */ in dw_hdmi_phy_init()
425 if (priv->venc.hdmi_use_enci) in dw_hdmi_phy_init()
436 /* Re-Enable VENC video stream */ in dw_hdmi_phy_init()
437 if (priv->venc.hdmi_use_enci) in dw_hdmi_phy_init()
447 if (priv->venc.hdmi_use_enci) in dw_hdmi_phy_init()
H A Dmeson_venc.c22 * VENC Handle the pixels encoding to the output formats.
34 * VENC paths :
39 * vd1---| |-| | | VENC /---------|----VDAC
935 /* Repeat VENC pixels for 480/576i/p, 720p50/60 and 1080p50/60 */ in meson_venc_hdmi_venc_repeat()
1006 /* Repeat VENC pixels for 480/576i/p, 720p50/60 and 1080p50/60 */ in meson_venc_hdmi_mode_set()
1527 /* Invert polarity of HSYNC from VENC */ in meson_venc_hdmi_mode_set()
1531 /* Invert polarity of VSYNC from VENC */ in meson_venc_hdmi_mode_set()
1539 * Write rate to the async FIFO between VENC and HDMI. in meson_venc_hdmi_mode_set()
1546 * Read rate to the async FIFO between VENC and HDMI. in meson_venc_hdmi_mode_set()
1554 priv->venc.hdmi_repeat = hdmi_repeat; in meson_venc_hdmi_mode_set()
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/openbmc/linux/Documentation/devicetree/bindings/soc/mediatek/
H A Dscpsys.txt37 Required clocks for MT2712: "mm", "mfg", "venc", "jpgdec", "audio", "vdec"
45 Required clocks for MT8173: "mm", "mfg", "venc", "venc_lt"
49 - venc-supply: Power supply for the venc power domain
70 clock-names = "mfg", "mm", "venc", "venc_lt";
/openbmc/linux/Documentation/devicetree/bindings/display/ti/
H A Dti,omap4-dss.txt21 - DSS Submodules: RFBI, VENC, DSI, HDMI
59 VENC
63 - compatible: "ti,omap4-venc"
71 - Video port for VENC output
73 VENC Endpoint required properties:
H A Dti,omap2-dss.txt45 VENC
49 - compatible: "ti,omap2-venc"
54 VENC Endpoint required properties:
H A Dti,omap3-dss.txt56 VENC
60 - compatible: "ti,omap3-venc"
67 VENC Endpoint required properties:
/openbmc/linux/Documentation/devicetree/bindings/power/
H A Damlogic,meson-ee-pwrc.yaml79 - const: venc
95 - const: venc
120 - const: venc
139 - const: venc
179 reset-names = "viu", "venc", "vcbus", "bt656",
/openbmc/linux/drivers/clk/mediatek/
H A DMakefile18 obj-$(CONFIG_COMMON_CLK_MT6779_VENCSYS) += clk-mt6779-venc.o
31 obj-$(CONFIG_COMMON_CLK_MT6797_VENCSYS) += clk-mt6797-venc.o
48 obj-$(CONFIG_COMMON_CLK_MT2712_VENCSYS) += clk-mt2712-venc.o
89 obj-$(CONFIG_COMMON_CLK_MT8183_VENCSYS) += clk-mt8183-venc.o
101 obj-$(CONFIG_COMMON_CLK_MT8186_VENCSYS) += clk-mt8186-venc.o
113 obj-$(CONFIG_COMMON_CLK_MT8188_VENCSYS) += clk-mt8188-venc.o
128 obj-$(CONFIG_COMMON_CLK_MT8192_VENCSYS) += clk-mt8192-venc.o
140 obj-$(CONFIG_COMMON_CLK_MT8195_VENCSYS) += clk-mt8195-venc.o
149 obj-$(CONFIG_COMMON_CLK_MT8365_VENC) += clk-mt8365-venc.o
H A Dclk-mt8365-venc.c24 /* VENC */
48 .name = "clk-mt8365-venc",
/openbmc/linux/drivers/media/platform/mediatek/vcodec/encoder/
H A Dmtk_vcodec_enc_pm.c37 dev_err(pm->dev, "[MTK VCODEC] Failed to get venc clock count"); in mtk_vcodec_init_enc_clk()
46 dev_err(pm->dev, "[MTK VCODEC] venc failed to get clk name %d", i); in mtk_vcodec_init_enc_clk()
52 dev_err(pm->dev, "[MTK VCODEC] venc devm_clk_get (%d)%s fail", i, in mtk_vcodec_init_enc_clk()
89 dev_err(pm->dev, "[MTK VCODEC] venc clk_prepare_enable %d %s fail %d", i, in mtk_vcodec_enc_clock_on()
H A DMakefile5 mtk-vcodec-enc-y := venc/venc_vp8_if.o \
6 venc/venc_h264_if.o \
H A Dvenc_vpu_if.c78 mtk_v4l2_venc_err(vpu->ctx, "venc msg id not correctly => 0x%x", msg->msg_id); in vpu_enc_ipi_handler()
143 vpu_enc_ipi_handler, "venc", in vpu_enc_init()
160 mtk_venc_err(vpu->ctx, "invalid venc vsi"); in vpu_enc_init()
/openbmc/linux/Documentation/devicetree/bindings/display/
H A Damlogic,meson-dw-hdmi.yaml36 Pixel data arrives in "4:4:4" format from the VENC block and the VPU HDMI mux
40 The VENC uses a DVI encoder on top of the ENCI or ENCP encoders to generate
89 A port node pointing to the VENC Input port node.
135 /* VPU VENC Input */
H A Damlogic,meson-vpu.yaml46 VENC: Video Encoders
49 The VENC is composed of the multiple pixel encoders
53 The VENC Unit gets a Pixel Clocks (VCLK) from a dedicated HDMI PLL and clock
/openbmc/linux/drivers/gpu/drm/omapdrm/
H A DKconfig51 bool "VENC support"
123 bool "Sleep 20ms after VENC reset"
126 There is a 20ms sleep after VENC reset which seemed to fix the
/openbmc/linux/arch/arm/mach-omap2/
H A Domap_hwmod_2xxx_3xxx_ipblock_data.c37 * 'venc' class
42 .name = "venc",
/openbmc/u-boot/arch/arm/dts/
H A Domap36xx.dtsi149 /* OMAP3630 needs dss_96m_fck for VENC */
150 &venc {
/openbmc/linux/drivers/media/platform/qcom/venus/
H A DMakefile11 venus-enc-objs += venc.o venc_ctrls.o

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