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/openbmc/linux/drivers/gpu/drm/amd/display/dc/basics/
H A Dvector.c27 #include "include/vector.h"
30 struct vector *vector, in dal_vector_construct() argument
35 vector->container = NULL; in dal_vector_construct()
43 vector->container = kcalloc(capacity, struct_size, GFP_KERNEL); in dal_vector_construct()
44 if (vector->container == NULL) in dal_vector_construct()
46 vector->capacity = capacity; in dal_vector_construct()
47 vector->struct_size = struct_size; in dal_vector_construct()
48 vector->count = 0; in dal_vector_construct()
49 vector->ctx = ctx; in dal_vector_construct()
53 static bool dal_vector_presized_costruct(struct vector *vector, in dal_vector_presized_costruct() argument
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/openbmc/qemu/gdb-xml/
H A Dhexagon-hvx.xml19 <vector id="vud" type="uint64" count="16"/>
20 <vector id="vd" type="int64" count="16"/>
21 <vector id="vuw" type="uint32" count="32"/>
22 <vector id="vw" type="int32" count="32"/>
23 <vector id="vuh" type="uint16" count="64"/>
24 <vector id="vh" type="int16" count="64"/>
25 <vector id="vub" type="uint8" count="128"/>
26 <vector id="vb" type="int8" count="128"/>
48 <vector id="vpd" type="uint8" count="16"/>
49 <vector id="vpw" type="ui4" count="32"/>
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/openbmc/qemu/tests/tcg/xtensa/
H A Dlinker.ld.S38 .vector.window XCHAL_WINDOW_VECTORS_VADDR :
41 *(.vector.window_overflow_4)
43 *(.vector.window_underflow_4)
45 *(.vector.window_overflow_8)
47 *(.vector.window_underflow_8)
49 *(.vector.window_overflow_12)
51 *(.vector.window_underflow_12)
55 .vector.level2 XCHAL_INTLEVEL2_VECTOR_VADDR :
57 *(.vector.level2)
61 .vector.level3 XCHAL_INTLEVEL3_VECTOR_VADDR :
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H A Dvectors.S3 .macro vector name macro
5 .section .vector.\name, "ax"
15 .section .vector.\name\().text, "ax"
36 vector window_overflow_4
37 vector window_overflow_8
38 vector window_overflow_12
39 vector window_underflow_4
40 vector window_underflow_8
41 vector window_underflow_12
45 vector level2
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/openbmc/linux/drivers/gpu/drm/amd/display/include/
H A Dvector.h29 struct vector { struct
38 struct vector *vector, argument
43 struct vector *dal_vector_create(
49 * each "structure" in the vector will contain zeros by default. */
50 struct vector *dal_vector_presized_create(
57 struct vector *vector);
60 struct vector **vector);
63 const struct vector *vector);
73 struct vector *vector,
78 struct vector *vector,
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/openbmc/qemu/hw/pci/
H A Dmsix.c36 static MSIMessage msix_prepare_message(PCIDevice *dev, unsigned vector) in msix_prepare_message() argument
38 uint8_t *table_entry = dev->msix_table + vector * PCI_MSIX_ENTRY_SIZE; in msix_prepare_message()
46 MSIMessage msix_get_message(PCIDevice *dev, unsigned vector) in msix_get_message() argument
48 return dev->msix_prepare_message(dev, vector); in msix_get_message()
55 void msix_set_message(PCIDevice *dev, int vector, struct MSIMessage msg) in msix_set_message() argument
57 uint8_t *table_entry = dev->msix_table + vector * PCI_MSIX_ENTRY_SIZE; in msix_set_message()
64 static uint8_t msix_pending_mask(int vector) in msix_pending_mask() argument
66 return 1 << (vector % 8); in msix_pending_mask()
69 static uint8_t *msix_pending_byte(PCIDevice *dev, int vector) in msix_pending_byte() argument
71 return dev->msix_pba + vector / 8; in msix_pending_byte()
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/openbmc/linux/arch/x86/include/asm/trace/
H A Dirq_vectors.h15 TP_PROTO(int vector),
17 TP_ARGS(vector),
20 __field( int, vector )
24 __entry->vector = vector;
27 TP_printk("vector=%d", __entry->vector) );
31 TP_PROTO(int vector), \
32 TP_ARGS(vector), NULL, NULL); \
34 TP_PROTO(int vector), \
35 TP_ARGS(vector), NULL, NULL);
39 * vector handler
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/openbmc/linux/arch/ia64/kernel/
H A Dirq_ia64.c13 * PCI to vector allocation routine.
61 * Legacy IRQ to IA-64 vector translation table.
74 .vector = IRQ_VECTOR_UNASSIGNED,
104 int pos, vector; in find_unassigned_vector() local
111 vector = IA64_FIRST_DEVICE_VECTOR + pos; in find_unassigned_vector()
112 cpumask_and(&mask, &domain, &vector_table[vector]); in find_unassigned_vector()
115 return vector; in find_unassigned_vector()
120 static int __bind_irq_vector(int irq, int vector, cpumask_t domain) in __bind_irq_vector() argument
127 BUG_ON((unsigned)vector >= IA64_NUM_VECTORS); in __bind_irq_vector()
132 if ((cfg->vector == vector) && cpumask_equal(&cfg->domain, &domain)) in __bind_irq_vector()
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/openbmc/linux/arch/x86/include/asm/
H A Didtentry.h21 * @vector: Vector number (ignored for C)
34 #define DECLARE_IDTENTRY(vector, func) \ argument
75 * @vector: Vector number (ignored for C)
86 #define DECLARE_IDTENTRY_ERRORCODE(vector, func) \ argument
119 * @vector: Vector number (ignored for C)
124 #define DECLARE_IDTENTRY_RAW(vector, func) \ argument
125 DECLARE_IDTENTRY(vector, func)
158 * @vector: Vector number (ignored for C)
163 #define DECLARE_IDTENTRY_RAW_ERRORCODE(vector, func) \ argument
164 DECLARE_IDTENTRY_ERRORCODE(vector, func)
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/openbmc/telemetry/src/
H A Dtrigger_factory.hpp21 const std::vector<std::string>& triggerActions,
22 const std::vector<std::string>& reportIds,
26 const std::vector<LabeledSensorInfo>& labeledSensorsinfo)
29 std::vector<LabeledSensorInfo>
32 std::vector<LabeledSensorInfo>
36 std::vector<std::shared_ptr<interfaces::Threshold>>& currentThresholds,
38 const std::vector<TriggerAction>& triggerActions,
39 const std::shared_ptr<std::vector<std::string>>& reportIds,
44 const std::vector<LabeledSensorInfo>& labeledSensorsInfo)
53 const std::vector<LabeledSensorInfo>& labeledSensorsInfo) const;
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H A Dtrigger_factory.cpp24 std::vector<std::shared_ptr<interfaces::Threshold>>& currentThresholds, in updateDiscreteThresholds()
26 const std::vector<TriggerAction>& triggerActions, in updateDiscreteThresholds()
27 const std::shared_ptr<std::vector<std::string>>& reportIds, in updateDiscreteThresholds()
29 const std::vector<discrete::LabeledThresholdParam>& newParams) const in updateDiscreteThresholds()
32 std::vector<std::shared_ptr<interfaces::Threshold>> newThresholds; in updateDiscreteThresholds()
90 std::vector<std::shared_ptr<interfaces::Threshold>>& currentThresholds, in updateNumericThresholds()
92 const std::vector<TriggerAction>& triggerActions, in updateNumericThresholds()
93 const std::shared_ptr<std::vector<std::string>>& reportIds, in updateNumericThresholds()
95 const std::vector<numeric::LabeledThresholdParam>& newParams) const in updateNumericThresholds()
98 std::vector<std::shared_ptr<interfaces::Threshold>> newThresholds; in updateNumericThresholds()
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/openbmc/linux/Documentation/arch/arm64/
H A Dsme.rst21 * PSTATE.SM, PSTATE.ZA, the streaming mode vector length, the ZA and (when
24 * The presence of SME is reported to userspace via HWCAP2_SME in the aux vector
30 aux vector AT_HWCAP2 entry. Presence of this flag implies the presence of
75 2. Vector lengths
78 SME defines a second vector length similar to the SVE vector length which is
81 mode SVE vector.
109 * All other SME state of a thread, including the currently configured vector
110 length, the state of the PR_SME_VL_INHERIT flag, and the deferred vector
127 the thread's vector length (in za_context.vl).
167 * The vector length cannot be changed via signal return. If za_context.vl in
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H A Dsve.rst2 Scalable Vector Extension support for AArch64 Linux
10 order to support use of the ARM Scalable Vector Extension (SVE), including
25 * SVE registers Z0..Z31, P0..P15 and FFR and the current vector length VL, are
32 * The presence of SVE is reported to userspace via HWCAP_SVE in the aux vector
46 be reported in the AT_HWCAP2 aux vector entry. In addition to this,
64 reported in the AT_HWCAP2 aux vector entry. Among other things SME adds
66 separate SME vector length and the same Z/V registers. See sme.rst
90 2. Vector length terminology
93 The size of an SVE vector (Z) register is referred to as the "vector length".
95 To avoid confusion about the units used to express vector length, the kernel
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/openbmc/linux/arch/x86/kernel/apic/
H A Dlocal.h17 void __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest);
22 void x2apic_send_IPI_all(int vector);
23 void x2apic_send_IPI_allbutself(int vector);
24 void x2apic_send_IPI_self(int vector);
31 static inline unsigned int __prepare_ICR(unsigned int shortcut, int vector, in __prepare_ICR() argument
36 switch (vector) { in __prepare_ICR()
38 icr |= APIC_DM_FIXED | vector; in __prepare_ICR()
56 void __default_send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest);
58 void default_send_IPI_single(int cpu, int vector);
59 void default_send_IPI_single_phys(int cpu, int vector);
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H A Dipi.c51 void apic_send_IPI_allbutself(unsigned int vector) in apic_send_IPI_allbutself() argument
57 __apic_send_IPI_allbutself(vector); in apic_send_IPI_allbutself()
59 __apic_send_IPI_mask_allbutself(cpu_online_mask, vector); in apic_send_IPI_allbutself()
144 static void __default_send_IPI_shortcut(unsigned int shortcut, int vector) in __default_send_IPI_shortcut() argument
148 * safe_apic_wait_icr_idle() for the NMI vector as there have been in __default_send_IPI_shortcut()
152 if (unlikely(vector == NMI_VECTOR)) in __default_send_IPI_shortcut()
158 native_apic_mem_write(APIC_ICR, __prepare_ICR(shortcut, vector, 0)); in __default_send_IPI_shortcut()
165 void __default_send_IPI_dest_field(unsigned int dest_mask, int vector, in __default_send_IPI_dest_field() argument
169 if (unlikely(vector == NMI_VECTOR)) in __default_send_IPI_dest_field()
177 native_apic_mem_write(APIC_ICR, __prepare_ICR(0, vector, dest_mode)); in __default_send_IPI_dest_field()
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H A Dx2apic_phys.c44 static void x2apic_send_IPI(int cpu, int vector) in x2apic_send_IPI() argument
50 __x2apic_send_IPI_dest(dest, vector, APIC_DEST_PHYSICAL); in x2apic_send_IPI()
54 __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest) in __x2apic_send_IPI_mask() argument
70 vector, APIC_DEST_PHYSICAL); in __x2apic_send_IPI_mask()
75 static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) in x2apic_send_IPI_mask() argument
77 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC); in x2apic_send_IPI_mask()
81 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) in x2apic_send_IPI_mask_allbutself() argument
83 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT); in x2apic_send_IPI_mask_allbutself()
86 static void __x2apic_send_IPI_shorthand(int vector, u32 which) in __x2apic_send_IPI_shorthand() argument
88 unsigned long cfg = __prepare_ICR(which, vector, 0); in __x2apic_send_IPI_shorthand()
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H A Dvector.c28 unsigned int vector; member
128 static void apic_update_irq_cfg(struct irq_data *irqd, unsigned int vector, in apic_update_irq_cfg() argument
135 apicd->hw_irq_cfg.vector = vector; in apic_update_irq_cfg()
138 trace_vector_config(irqd->irq, vector, cpu, in apic_update_irq_cfg()
151 trace_vector_update(irqd->irq, newvec, newcpu, apicd->vector, in apic_update_vector()
155 * If there is no vector associated or if the associated vector is in apic_update_vector()
156 * the shutdown vector, which is associated to make PCI/MSI in apic_update_vector()
161 if (!apicd->vector || apicd->vector == MANAGED_IRQ_SHUTDOWN_VECTOR) in apic_update_vector()
164 * If the target CPU of the previous vector is online, then mark in apic_update_vector()
165 * the vector as move in progress and store it for cleanup when the in apic_update_vector()
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/openbmc/linux/arch/x86/hyperv/
H A Dhv_apic.c107 static bool __send_ipi_mask_ex(const struct cpumask *mask, int vector, in __send_ipi_mask_ex() argument
124 ipi_arg->vector = vector; in __send_ipi_mask_ex()
157 static bool __send_ipi_mask(const struct cpumask *mask, int vector, in __send_ipi_mask() argument
165 trace_hyperv_send_ipi_mask(mask, vector); in __send_ipi_mask()
184 if ((vector < HV_IPI_LOW_VECTOR) || (vector > HV_IPI_HIGH_VECTOR)) in __send_ipi_mask()
200 ipi_arg.vector = vector; in __send_ipi_mask()
220 status = hv_do_fast_hypercall16(HVCALL_SEND_IPI, ipi_arg.vector, in __send_ipi_mask()
225 return __send_ipi_mask_ex(mask, vector, exclude_self); in __send_ipi_mask()
228 static bool __send_ipi_one(int cpu, int vector) in __send_ipi_one() argument
233 trace_hyperv_send_ipi_one(cpu, vector); in __send_ipi_one()
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/openbmc/linux/drivers/net/wireless/ti/wl12xx/
H A Devent.c37 u32 vector; in wl12xx_process_mailbox_events() local
40 vector = le32_to_cpu(mbox->events_vector); in wl12xx_process_mailbox_events()
41 vector &= ~(le32_to_cpu(mbox->events_mask)); in wl12xx_process_mailbox_events()
43 wl1271_debug(DEBUG_EVENT, "MBOX vector: 0x%x", vector); in wl12xx_process_mailbox_events()
45 if (vector & SCAN_COMPLETE_EVENT_ID) { in wl12xx_process_mailbox_events()
53 if (vector & PERIODIC_SCAN_REPORT_EVENT_ID) { in wl12xx_process_mailbox_events()
61 if (vector & PERIODIC_SCAN_COMPLETE_EVENT_ID) in wl12xx_process_mailbox_events()
64 if (vector & SOFT_GEMINI_SENSE_EVENT_ID) in wl12xx_process_mailbox_events()
68 if (vector & BSS_LOSE_EVENT_ID) in wl12xx_process_mailbox_events()
71 if (vector & RSSI_SNR_TRIGGER_0_EVENT_ID) in wl12xx_process_mailbox_events()
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/openbmc/phosphor-objmgr/src/
H A Dhandler.hpp6 #include <vector>
8 void addObjectMapResult(std::vector<InterfaceMapType::value_type>& objectMap,
12 std::vector<InterfaceMapType::value_type>
14 std::vector<std::string>& interfaces);
18 std::vector<std::string>& interfaces);
20 std::vector<InterfaceMapType::value_type>
22 int32_t depth, std::vector<std::string>& interfaces);
24 std::vector<std::string>
26 int32_t depth, std::vector<std::string>& interfaces);
41 * @return std::vector<InterfaceMapType::value_type>
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/openbmc/bmcweb/test/redfish-core/lib/
H A Dethernet_test.cpp9 #include <vector>
23 std::vector<std::variant<nlohmann::json::object_t, std::nullptr_t>> addr; in TEST()
24 std::vector<IPv4AddressData> existingAddr; in TEST()
26 std::vector<AddressPatch> addrOut; in TEST()
39 std::vector<std::variant<nlohmann::json::object_t, std::nullptr_t>> addr; in TEST()
45 std::vector<IPv4AddressData> existingAddr; in TEST()
47 std::vector<AddressPatch> addrOut; in TEST()
65 std::vector<std::variant<nlohmann::json::object_t, std::nullptr_t>> addr; in TEST()
70 std::vector<IPv4AddressData> existingAddr; in TEST()
72 std::vector<AddressPatch> addrOut; in TEST()
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/openbmc/qemu/docs/system/arm/
H A Dcpu-features.rst57 optional SVE vector lengths (see "SVE CPU Properties"). While with TCG
58 all SVE vector lengths can be supported, when KVM is in use it's more
88 vector lengths::
160 The example above disables the PMU and enables the first two SVE vector
164 defaults, it would seem we need to disable many SVE vector lengths, rather
166 disabling many SVE vector lengths would be quite verbose, the ``sve<N>`` CPU
234 is used to enable or disable specific vector lengths, where ``N`` is the
237 Constraints" below. Additionally, as we want all supported vector lengths
246 1) At least one vector length must be enabled when ``sve`` is enabled.
248 2) If a vector length ``N`` is enabled, then, when KVM is enabled, all
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/openbmc/phosphor-net-ipmid/
H A Dintegrity_algo.cpp15 AlgoSHA1::AlgoSHA1(const std::vector<uint8_t>& sik) : in AlgoSHA1()
21 std::vector<uint8_t>
24 std::vector<uint8_t> output(SHA_DIGEST_LENGTH); in generateHMAC()
43 const std::vector<uint8_t>& packet, const size_t length, in verifyIntegrityData()
44 std::vector<uint8_t>::const_iterator integrityDataBegin, in verifyIntegrityData()
45 std::vector<uint8_t>::const_iterator integrityDataEnd) const in verifyIntegrityData()
56 std::vector<uint8_t>
57 AlgoSHA1::generateIntegrityData(const std::vector<uint8_t>& packet) const in generateIntegrityData()
64 std::vector<uint8_t> AlgoSHA1::generateKn(const std::vector<uint8_t>& sik, in generateKn()
68 std::vector<uint8_t> Kn(sik.size()); in generateKn()
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/openbmc/openpower-pnor-code-mgmt/test/
H A Dtest_functions.cpp13 #include <vector>
21 std::map<std::string, std::vector<std::string>> extensionMap{{ in TEST()
24 std::vector<std::string> compatibleSystem{"system-foo"s}, extensions; in TEST()
29 EXPECT_EQ(extensions, std::vector<std::string>{".EXT"s}); in TEST()
34 std::map<std::string, std::vector<std::string>> extensionMap{{ in TEST()
37 std::vector<std::string> compatibleSystem{"system-foo"s}, in TEST()
43 EXPECT_EQ(extensions, std::vector<std::string>{"foo"s}); in TEST()
48 std::map<std::string, std::vector<std::string>> extensionMap{{ in TEST()
52 std::vector<std::string> compatibleSystem{"system-foo"s}, in TEST()
58 EXPECT_EQ(extensions, std::vector<std::string>{".FOO"s}); in TEST()
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/openbmc/linux/arch/arc/kernel/
H A Dentry-arcv2.S22 #define VECTOR .word macro
24 ;############################ Vector Table #################################
26 .section .vector,"a",@progbits
30 VECTOR res_service ; Reset Vector label
31 VECTOR mem_service ; Mem exception label
32 VECTOR instr_service ; Instrn Error label
33 VECTOR EV_MachineCheck ; Fatal Machine check label
34 VECTOR EV_TLBMissI ; Intruction TLB miss label
35 VECTOR EV_TLBMissD ; Data TLB miss label
36 VECTOR EV_TLBProtV ; Protection Violation label
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