/openbmc/linux/tools/edid/ |
H A D | edid.S | 18 Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 48 ((((v1-'@')&0x1f)<<10)+(((v2-'@')&0x1f)<<5)+((v3-'@')&0x1f)) 74 /* Year of manufacture, less 1990. (1990-2245) 76 year: .byte YEAR-1990 82 Bits 6-1 Reserved, must be 0 86 Bits 6-5 Video white and sync levels, relative to blank 87 00=+0.7/-0.3 V; 01=+0.714/-0.286 V; 88 10=+1.0/-0.4 V; 11=+0.7/0 V 89 Bit 4 Blank-to-black setup (pedestal) expected 94 sync-on-green is used. */ [all …]
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/openbmc/linux/Documentation/fb/ |
H A D | modedb.rst | 9 - one routine to probe for video modes, which can be used by all frame buffer 11 - one generic video mode database with a fair amount of standard videomodes 13 - the possibility to supply your own mode database for graphics hardware that 14 needs non-standard modes, like amifb and Mac frame buffer drivers (which 23 <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] 24 <name>[-<bpp>][@<refresh>] 31 - NSTC: 480i output, with the CCIR System-M TV mode and NTSC color encoding 32 - NTSC-J: 480i output, with the CCIR System-M TV mode, the NTSC color 33 encoding, and a black level equal to the blanking level. 34 - PAL: 576i output, with the CCIR System-B TV mode and PAL color encoding [all …]
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/openbmc/openbmc/meta-nuvoton/recipes-nuvoton/program-edid/program-edid/ |
H A D | edid.json | 8 "DPM active-off supported": true, 46 "Blanking": { object 70 "Horizontal sync (outside of V-sync)": "Positive", 81 "Blanking": { object 105 "Horizontal sync (outside of V-sync)": "Positive",
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/openbmc/linux/include/drm/ |
H A D | drm_mipi_dsi.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd. 24 * struct mipi_dsi_msg - read/write DSI buffer 49 * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format 67 * struct mipi_dsi_host_ops - DSI bus operations 99 * struct mipi_dsi_host - DSI host device 124 /* enable hsync-end packets in vsync-pulse and v-porch area */ 126 /* disable hfront-porch area */ 128 /* disable hback-porch area */ 130 /* disable hsync-active area */ [all …]
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H A D | drm_modes.h | 3 * Copyright © 2007-2008 Dave Airlie 4 * Copyright © 2007-2008 Intel Corporation 46 * enum drm_mode_status - hardware support status of a mode 70 * @MODE_HBLANK_NARROW: horizontal blanking too narrow 71 * @MODE_HBLANK_WIDE: horizontal blanking too wide 74 * @MODE_VBLANK_NARROW: vertical blanking too narrow 75 * @MODE_VBLANK_WIDE: vertical blanking too wide 81 * @MODE_NO_REDUCED: monitor doesn't accept reduced blanking 129 MODE_STALE = -3, 130 MODE_BAD = -2, [all …]
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/openbmc/linux/drivers/media/i2c/ |
H A D | imx335.c | 1 // SPDX-License-Identifier: GPL-2.0-only 15 #include <media/v4l2-ctrls.h> 16 #include <media/v4l2-fwnode.h> 17 #include <media/v4l2-subdev.h> 59 * struct imx335_reg - imx335 sensor register 69 * struct imx335_reg_list - imx335 sensor register list 79 "avdd", /* Analog (2.9V) supply */ 80 "ovdd", /* Digital I/O (1.8V) supply */ 81 "dvdd", /* Digital Core (1.2V) supply */ 85 * struct imx335_mode - imx335 sensor mode structure [all …]
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H A D | ths8200.c | 2 * ths8200 - Texas Instruments THS8200 video encoder driver 23 #include <linux/v4l2-dv-timings.h> 25 #include <media/v4l2-dv-timings.h> 26 #include <media/v4l2-async.h> 27 #include <media/v4l2-device.h> 33 MODULE_PARM_DESC(debug, "debug level (0-2)"); 93 /* To set specific bits in the register, a clear-mask is given (to be AND-ed), 94 * and then the value-mask (to be OR-ed). 108 reg->val = ths8200_read(sd, reg->reg & 0xff); in ths8200_g_register() 109 reg->size = 1; in ths8200_g_register() [all …]
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/openbmc/linux/drivers/media/pci/cx18/ |
H A D | cx18-av-core.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Derived from cx25840-core.c 11 #include "cx18-driver.h" 12 #include "cx18-io.h" 13 #include "cx18-cards.h" 106 /* xtal * 0xe.2913d68/0x16 = 48000 * 384: 406 MHz pre post-div*/ in cx18_av_init() 118 u32 v; in cx18_av_initialize() local 126 v = cx18_av_read4(cx, CXADEC_HOST_REG1); in cx18_av_initialize() 127 /* enable sleep mode - register appears to be read only... */ in cx18_av_initialize() 128 cx18_av_write4_expect(cx, CXADEC_HOST_REG1, v | 1, v, 0xfffe); in cx18_av_initialize() [all …]
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H A D | cx18-av-vbi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Derived from cx25840-vbi.c 11 #include "cx18-driver.h" 14 * For sliced VBI output, we set up to use VIP-1.1, 8-bit mode, 16 * Thus, according to the VIP-2 Spec, our VBI ancillary data lines 24 * 2 byte Internal DID: VBI-line-# 0x80 29 * The RP codes for EAVs when in VIP-1.1 mode, not in raw mode, & 30 * in the vertical blanking interval are: 34 * Since the V bit is only allowed to toggle in the EAV RP code, just 121 struct cx18_av_state *state = &cx->av_state; in cx18_av_g_sliced_fmt() [all …]
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H A D | cx18-driver.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 5 * Derived from ivtv-driver.h 24 #include <linux/i2c-algo-bit.h> 33 #include <media/v4l2-common.h> 34 #include <media/v4l2-ioctl.h> 35 #include <media/v4l2-device.h> 36 #include <media/v4l2-fh.h> 38 #include <media/i2c/ir-kbd-i2c.h> 39 #include "cx18-mailbox.h" 40 #include "cx18-av-core.h" [all …]
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/openbmc/linux/drivers/gpu/drm/ |
H A D | drm_modes.c | 2 * Copyright © 1997-2003 by The XFree86 Project, Inc. 4 * Copyright © 2007-2008 Intel Corporation 6 * Copyright 2005-2006 Luc Verhaegen 53 * drm_mode_debug_printmodeline - print a mode to dmesg 65 * drm_mode_create - create a new display mode 87 * drm_mode_destroy - remove a mode 103 * drm_mode_probed_add - add a mode to a connector's probed_mode list 114 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex)); in drm_mode_probed_add() 116 list_add_tail(&mode->hea in drm_mode_probed_add() [all...] |
H A D | drm_vblank.c | 54 * scanlines is referred to as the vertical blanking region, or vblank for 57 * For historical reference, the vertical blanking period was designed to 60 * blanking periods. They were designed to give the electron gun enough 85 * blanking ┆xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx┆ 91 * "Physical top of display" is the reference point for the high-precision/ 95 * vertical blanking period so that settings like gamma, the image buffer 108 * Vertical blanking plays a major role in graphics rendering. To achieve 109 * tear-free display, users must synchronize page flips and/or rendering to 110 * vertical blanking. The DRM API offers ioctls to perform page flips 111 * synchronized to vertical blanking and wait for vertical blanking. [all …]
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/openbmc/linux/Documentation/devicetree/bindings/display/mediatek/ |
H A D | mediatek,ethdr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 21 These two function blocks read the pre-programmed registers from DRAM and 22 set them to HW in the v-blanking period. 26 const: mediatek,mt8195-disp-ethdr 31 reg-names: 33 - const: mixer [all …]
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/openbmc/linux/drivers/staging/fbtft/ |
H A D | fb_st7789v.c | 1 // SPDX-License-Identifier: GPL-2.0+ 34 * enum st7789v_command - ST7789V display controller commands 86 * init_tearing_effect_line() - init tearing effect line. 93 struct device *dev = par->info->device; in init_tearing_effect_line() 130 * init_display() - initialize the display controller 147 par->fbtftops.reset(par); in init_display() 157 /* set pixel format to RGB-565 */ in init_display() 166 * VGH = 13.26V in init_display() 167 * VGL = -10.43V in init_display() 181 * VAP = 4.1V + (VCOM + VCOM offset + 0.5 * VDV) in init_display() [all …]
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/openbmc/linux/include/uapi/linux/ |
H A D | videodev2.h | 1 /* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) */ 5 * Copyright (C) 1999-2012 the contributors 47 * All kernel-specific stuff were moved to media/v4l2-dev.h, so 66 #include <linux/v4l2-common.h> 67 #include <linux/v4l2-controls.h> 80 /* Four-character-code (FOURCC) */ 98 buffer, top-bottom order */ 99 V4L2_FIELD_SEQ_BT = 6, /* same as above + bottom-top order */ 205 /* Obsolete pre-1998 SMPTE 240M HDTV standard, superseded by Rec 709 */ 230 * and V4L2_QUANTIZATION_FULL_RANGE. To be used for (Motion-)JPEG. [all …]
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/openbmc/linux/drivers/gpu/drm/omapdrm/dss/ |
H A D | hdmi5_core.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 28 void __iomem *base = core->base; in hdmi5_core_ddc_init() 37 unsigned int v; in hdmi5_core_ddc_init() local 52 v = DIV_ROUND_UP_ULL(ss_scl_high * sfr, 1000000); in hdmi5_core_ddc_init() 54 (v >> 8) & 0xff, 7, 0); in hdmi5_core_ddc_init() 56 v & 0xff, 7, 0); in hdmi5_core_ddc_init() 59 v = DIV_ROUND_UP_ULL(ss_scl_low * sfr, 1000000); in hdmi5_core_ddc_init() 61 (v >> 8) & 0xff, 7, 0); in hdmi5_core_ddc_init() 63 v & 0xff, 7, 0); in hdmi5_core_ddc_init() [all …]
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/openbmc/linux/drivers/video/fbdev/omap2/omapfb/dss/ |
H A D | hdmi5_core.c | 1 // SPDX-License-Identifier: GPL-2.0-only 41 void __iomem *base = core->base; in hdmi_core_ddc_init() 50 unsigned v; in hdmi_core_ddc_init() local 65 v = DIV_ROUND_UP_ULL(ss_scl_high * sfr, 1000000); in hdmi_core_ddc_init() 67 (v >> 8) & 0xff, 7, 0); in hdmi_core_ddc_init() 69 v & 0xff, 7, 0); in hdmi_core_ddc_init() 72 v = DIV_ROUND_UP_ULL(ss_scl_low * sfr, 1000000); in hdmi_core_ddc_init() 74 (v >> 8) & 0xff, 7, 0); in hdmi_core_ddc_init() 76 v & 0xff, 7, 0); in hdmi_core_ddc_init() 79 v = DIV_ROUND_UP_ULL(fs_scl_high * sfr, 1000000); in hdmi_core_ddc_init() [all …]
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/openbmc/linux/drivers/gpu/drm/armada/ |
H A D | armada_crtc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 35 * This is how it is defined by CEA-861-D - line and pixel numbers are 44 * 22 blanking lines. VSYNC at 1320 (referenced to the HSYNC rising edge). 50 * 23 blanking lines 56 * Odd frame, 563 total lines, VSYNC at line 543-548, pixel 1128. 57 * Even frame, 562 total lines, VSYNC at line 542-547, pixel 2448. 61 * vtotal = mode->crtc_vtotal + 1; 62 * vbackporch = mode->crtc_vsync_start - mode->crtc_vdisplay + 1; 63 * vhorizpos = mode->crtc_hsync_start - mode->crtc_htotal / 2 65 * vtotal = mode->crtc_vtotal; [all …]
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/openbmc/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_tv_regs.h | 1 /* SPDX-License-Identifier: MIT */ 41 /* Sets the colorburst to PAL mode. Required for non-M PAL modes. */ 56 /* Read-only state that reports all features enabled */ 58 /* Read-only state that reports that Macrovision is disabled in hardware*/ 60 /* Read-only state that reports that TV-out is disabled in hardware. */ 64 /* Encoder test pattern 1 - combo pattern */ 66 /* Encoder test pattern 2 - full screen vertical 75% color bars */ 68 /* Encoder test pattern 3 - full screen horizontal 75% color bars */ 70 /* Encoder test pattern 4 - random noise */ 72 /* Encoder test pattern 5 - linear color ramps */ [all …]
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/openbmc/linux/drivers/gpu/drm/nouveau/dispnv04/ |
H A D | nvreg.h | 3 * Copyright 1996-1997 David J. McKay 24 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nvreg.h,v 1.6 2002/01/25 21:56:06 tsi Exp $ … 192 # define NV_CIO_CR_HBS_INDEX 0x02 /* horizontal blanking start */ 193 # define NV_CIO_CR_HBE_INDEX 0x03 /* horizontal blanking end */ 246 # define NV_CIO_CR_ARX_INDEX 0x26 /* attribute index -- ro copy of 0x60.3c0 */ 289 # define NV_CIO_CRE_4B 0x4b /* given patterns in 0x[2-3][a-c] regs, probably scratch 6 */ 295 # define NV_CIO_CRE_59 0x59 /* related to on/off-chip-ness of digital outputs */
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/openbmc/linux/drivers/media/usb/gspca/ |
H A D | sq930x.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (C) 2010 Jean-François Moine <http://moinejf.free.fr> 6 * Copyright (C) 2006 -2008 Gerard Klaver <gerard at gkall dot hobby dot nl> 16 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>\n" 199 {0x30, 0x0040}, /* reserved - def 0x0005 */ 200 {0x31, 0x0000}, /* reserved - def 0x002a */ 201 {0x34, 0x0100}, /* reserved - def 0x0100 */ 202 {0x3d, 0x068f}, /* reserved - def 0x068f */ 224 {0x62, 0x041d}, /* reserved - def 0x0418 */ 227 {0x05, 0x007b}, /* horiz blanking */ [all …]
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/bios/ |
H A D | command_table2.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 44 bp->base.ctx->logger 50 …(amdgpu_atom_execute_table(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.atom_… 55 …amdgpu_atom_parse_cmd_header(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.ato… 59 bios_cmd_table_para_revision(bp->base.ctx->driver_context, \ 70 if (amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, in bios_cmd_table_para_revision() 101 bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v1_5; in init_dig_encoder_control() 104 dm_output_to_console("Don't have dig_encoder_control for v%d\n", version); in init_dig_encoder_control() 105 bp->cmd_tbl.dig_encoder_control = encoder_control_fallback; in init_dig_encoder_control() 122 sizeof(cmd.digx_encoder_control) - in encoder_control_dmcub() [all …]
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/openbmc/linux/drivers/media/platform/xilinx/ |
H A D | xilinx-tpg.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2013-2015 Ideas on Board 6 * Copyright (C) 2013-2015 Xilinx, Inc. 17 #include <linux/xilinx-v4l2-controls.h> 19 #include <media/v4l2-async.h> 20 #include <media/v4l2-ctrls.h> 21 #include <media/v4l2-subdev.h> 23 #include "xilinx-vip.h" 24 #include "xilinx-vtc.h" 62 * The minimum blanking value is one clock cycle for the front porch, one clock [all …]
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/openbmc/linux/drivers/video/fbdev/ |
H A D | pm3fb.c | 2 * linux/drivers/video/pm3fb.c -- 3DLabs Permedia3 frame buffer device 10 * Sven Luther, <luther@dpt-info.u-strasbg.fr> 16 * Copyright (C) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT) 70 u32 video; /* video flags before blanking */ 97 return fb_readl(par->v_regs + off); in PM3_READ_REG() 100 static inline void PM3_WRITE_REG(struct pm3_par *par, s32 off, u32 v) in PM3_WRITE_REG() argument 102 fb_writel(v, par->v_regs + off); in PM3_WRITE_REG() 111 static inline void PM3_WRITE_DAC_REG(struct pm3_par *par, unsigned r, u8 v) in PM3_WRITE_DAC_REG() argument 117 PM3_WRITE_REG(par, PM3RD_IndexedData, v); in PM3_WRITE_DAC_REG() 161 ? reqclock - freq in pm3fb_calculate_clock() [all …]
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H A D | pm2fb.c | 8 * Copyright (c) 1998-2000 Ilario Nardinocchi (nardinoc@CS.UniBO.IT) 14 * I have a Creative Graphics Blaster Exxtreme card - pm2fb on x86. I 16 * hopefully other big-endian) devices now work, thanks to a lot of 71 * support on TVP4010 and similar where there is no RAMDAC - see 74 * fixed-frequency monitor which absolutely has to have -ve sync. So 76 * should be silently turned in -ve sync. 92 u32 video; /* video flags before blanking */ 128 .height = -1, 129 .width = -1, 147 return fb_readl(p->v_regs + off); in pm2_RD() [all …]
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