| /openbmc/u-boot/doc/ |
| H A D | README.memory-test | 1 The most frequent cause of problems when porting U-Boot to new
8 U-Boot implements 3 different approaches to perform memory tests:
12 This function is supposed to be used in each and every U-Boot port
14 memory banks on this piece of hardware. The code is supposed to be
16 little known and generally underrated fact that this code will also
18 errors. It is strongly recommended to always use this function, in
19 each and every port of U-Boot.
23 This is probably the best known memory test utility in U-Boot.
29 - It is terribly slow. Running "mtest" on the whole system RAM
33 - It is difficult to configure, and to use. And any errors here
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| H A D | README.ramboot-ppc85xx | 5 pre-mechanism is required to load the DDR with the bootloader binary.
6 - In case of SD and SPI boot this is done by BootROM code inside the chip
8 - In case of NAND boot FCM supports loading initial 4K code from NAND flash
15 1. Load the RAM based bootloader onto DDR via JTAG/BDI interface. And then
18 - In very early stage of platform bringup where other boot options are not
20 - In case the support to program the flashes on the board is not available.
22 2. Load the RAM based bootloader onto DDR using already existing bootloader on
25 - While developing some new feature of u-boot, for example USB driver or
31 - Suppose a platform already has a propreitery bootloader which does not
32 support for example AMP boot. In this case also RAM boot loader can be
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| H A D | README.POST | 1 Power-On-Self-Test support in U-Boot
2 ------------------------------------
4 This project is to support Power-On-Self-Test (POST) in U-Boot.
6 1. High-level requirements
11 and running Power-On-Self-Test in U-Boot. This framework shall
21 The framework shall allow run-time configuration of the lists
22 of tests running on normal/power-fail booting.
31 3) The following POST tests shall be developed for MPC823E-based
51 enhancing U-Boot/Linux to provide a common framework for running POST
54 2.1. Hardware-independent POST layer
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| /openbmc/u-boot/arch/arm/mach-tegra/tegra20/ |
| H A D | emc.c | 1 // SPDX-License-Identifier: GPL-2.0+
9 #include <asm/arch-tegra/ap.h>
10 #include <asm/arch-tegra/apb_misc.h>
92 /* Error codes we use */
94 ERR_NO_EMC_NODE = -10,
104 * Find EMC tables for the given ram code.
106 * The tegra EMC binding has two options, one using the ram code and one not.
107 * We detect which is in use by looking for the nvidia,use-ram-code property.
109 * otherwise we select the correct emc-tables subnode based on the 'ram_code'
113 * @param node EMC node (nvidia,tegra20-emc compatible string)
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| /openbmc/u-boot/lib/lzma/ |
| H A D | lzma.txt | 2 -------------
5 and tools you need to develop applications that use LZMA compression.
8 in 7-Zip compression program (www.7-zip.org). LZMA provides high
19 -------
23 Some code in LZMA SDK is based on public domain code from another developers:
25 2) SHA-256: Wei Dai (Crypto++ library)
29 -----------------
33 - ANSI-C/C++/C#/Java source code for LZMA compressing and decompressing
34 - Compiled file->file LZMA compressing/decompressing program for Windows system
38 ------------------
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| /openbmc/qemu/migration/ |
| H A D | postcopy-ram.h | 2 * Postcopy migration for RAM
10 * See the COPYING file in the top-level directory.
16 #include "qapi/qapi-types-migration.h"
18 /* Return true if the host supports everything we need to do postcopy-ram */
23 * Make all of RAM sensitive to accesses to areas that haven't yet been written
29 * Initialise postcopy-ram, setting the RAM to a state where we can go into
31 * called from ram.c's similarly named ram_postcopy_incoming_init
41 * Userfault requires us to mark RAM as NOHUGEPAGE prior to discard
48 * Called at the start of each RAMBlock by the bitmap code.
53 * Called by the bitmap code for each chunk to discard.
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| /openbmc/linux/include/linux/ |
| H A D | hp_sdc.h | 2 * HP i8042 System Device Controller -- header
7 * Redistribution and use in source and binary forms, with or without
10 * 1. Redistributions of source code must retain the above copyright
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A
34 * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2
79 * Nuance: never HP_SDC_ACT_DATAIN | HP_SDC_ACT_DEALLOC, use another
104 #define HP_SDC_STATUS_PUP 0x70 /* Successful power-up self test */
134 #define HP_SDC_STR 0x7f /* i8042 self-test result */
146 #define HP_SDC_CFG_ROLLOVER 0x08 /* WTF is "N-key rollover"? */
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| /openbmc/u-boot/board/freescale/m547xevb/ |
| H A D | README | 4 TsiChung Liew(Tsi-Chung.Liew@freescale.com)
12 - board/freescale/m547xevb/m547xevb.c Dram setup, IDE pre init, and PCI init
13 - board/freescale/m547xevb/mii.c MII init
14 - board/freescale/m547xevb/Makefile Makefile
15 - board/freescale/m547xevb/config.mk config make
16 - board/freescale/m547xevb/u-boot.lds Linker description
18 - arch/m68k/cpu/mcf547x_8x/cpu.c cpu specific code
19 - arch/m68k/cpu/mcf547x_8x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs
20 - arch/m68k/cpu/mcf547x_8x/interrupts.c cpu specific interrupt support
21 - arch/m68k/cpu/mcf547x_8x/slicetimer.c Timer support
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| /openbmc/linux/Documentation/arch/arm/ |
| H A D | tcm.rst | 2 ARM TCM (Tightly-Coupled Memory) handling in Linux
7 Some ARM SoCs have a so-called TCM (Tightly-Coupled Memory).
8 This is usually just a few (4-64) KiB of RAM inside the ARM
12 Harvard-architecture, so there is an ITCM (instruction TCM)
24 determine if ITCM (bits 1-0) and/or DTCM (bit 17-16) is present
32 place you put it, it will mask any underlying RAM from the
33 CPU so it is usually wise not to overlap any physical RAM with
47 be able to lock and hide one of the banks for use by the secure
52 - FIQ and other interrupt handlers that need deterministic
55 - Idle loops where all external RAM is set to self-refresh
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| H A D | porting.rst | 5 Taken from list archive at http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2001-July/00406…
8 -------------------
14 phys = virt - PAGE_OFFSET + PHYS_OFFSET
18 --------------------
23 the time when you call the decompressor code. You normally call
25 to be located in RAM, it can be in flash or other read-only or
26 read-write addressable medium.
29 Start address of zero-initialised work area for the decompressor.
30 This must be pointing at RAM. The decompressor will zero initialise
43 Physical address to place the initial RAM disk. Only relevant if
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| /openbmc/linux/drivers/net/ethernet/amd/ |
| H A D | mvme147.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * Uses the generic 7990.c LANCE code.
30 /* We have 32K of RAM for the init block and buffers. This places
31 * an upper limit on the number of buffers we can use. NetBSD uses 8 Rx
37 #include "7990.h" /* use generic LANCE code */
42 unsigned long ram; member
47 * plus board-specific init, open and close actions.
48 * Oh, and we need to tell the generic code how to read and write LANCE registers...
70 /* Initialise the one and only on-board 7990 */
83 return ERR_PTR(-ENODEV); in mvme147lance_probe()
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| /openbmc/linux/drivers/block/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
12 drivers. This option alone does not add any kernel code.
25 If you want to use the floppy disk drive(s) of your PC under Linux,
28 <file:Documentation/admin-guide/blockdev/floppy.rst>.
40 If you want to use actual physical floppies and expect to do
41 special low-level hardware accesses to them (access and use
42 non-standard formats, for example), then enable this.
44 Note that the code enabled by this option is rarely used and
64 If you have a SWIM-3 (Super Woz Integrated Machine 3; from Apple)
78 This enables support for using Chip RAM and Zorro II RAM as a
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| /openbmc/linux/kernel/power/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "Suspend to RAM and standby"
9 suspend-to-RAM state (e.g. the ACPI S3 state).
12 bool "Enable freezer for suspend to RAM/standby" \
18 done, no tasks are frozen for suspend to RAM/standby.
23 bool "Skip kernel's sys_sync() on suspend to RAM/standby"
30 user-space before invoking suspend. There's a run-time switch
32 This setting changes the default for the run-tim switch. Say Y
54 Alternatively, you can use the additional userland tools available
59 of the reasons to use software suspend is that the firmware hooks
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| /openbmc/u-boot/common/spl/ |
| H A D | Kconfig | 25 supports MMC, NAND and YMODEM and other methods loading of U-Boot
29 bool "Pass hand-off information from SPL to U-Boot proper"
32 It is useful to be able to pass information from SPL to U-Boot
33 proper to preserve state that is known in SPL and is needed in U-Boot.
34 Enable this to locate the handoff information in U-Boot proper, early
35 in boot. It is available in gd->handoff. The state state is set up
44 This option can minilize the SPL size to compatible with AST2600-A0
48 bool "Pass hand-off information from SPL to U-Boot proper"
53 used to pass information like the size of SDRAM from SPL to U-Boot
59 default "arch/$(ARCH)/cpu/u-boot-spl.lds"
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| /openbmc/qemu/docs/devel/migration/ |
| H A D | best-practices.rst | 8 The migration stream can be analyzed thanks to ``scripts/analyze-migration.py``.
12 .. code-block:: shell
14 $ qemu-system-x86_64 -display none -monitor stdio
17 $ ./scripts/analyze-migration.py -f mig
19 "ram (3)": {
21 "pc.ram": "0x0000000008000000",
24 See also ``analyze-migration.py -h`` help for more options.
29 Migration migrates the copies of RAM and ROM, and thus when running
32 is the new firmware in use.
34 - Changes in firmware size can cause changes in the required RAMBlock size
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| /openbmc/linux/arch/arm/kernel/ |
| H A D | reboot.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1996-2000 Russell King - Converted to ARM.
26 * A temporary stack to use for CPU reset. This is static so that we
30 * code.
88 * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
89 * kexec'd kernel to use any and all RAM as it sees fit, without having to
90 * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
111 * Power-off simply requires that the secondary CPUs stop performing any
126 * use soft_restart() as their machine descriptor's .restart hook, since that
129 * This is required so that any code running after reset on the primary CPU
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| /openbmc/linux/arch/m68k/ |
| H A D | Kconfig.machine | 1 # SPDX-License-Identifier: GPL-2.0
13 you plan to use this kernel on an Amiga, say Y here and browse the
23 This option enables support for the 68000-based Atari series of
24 computers (including the TT, Falcon and Medusa). If you plan to use
40 computers. If you plan to use this kernel on a Mac, say Y here and
41 browse the documentation available at <http://www.mac.linux-m68k.org/>;
50 Say Y here if you want to run Linux on an MC680x0-based Apollo
70 build a kernel which can run on MVME147 single-board computers. If
105 experimental. If you plan to try to use the kernel on such a machine
130 The Q40 is a Motorola 68040-based successor to the Sinclair QL
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| /openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | nvidia,tegra20-emc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra20-emc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
15 The External Memory Controller (EMC) interfaces with the off-chip SDRAM to
17 various performance-affecting settings beyond the obvious SDRAM configuration
23 const: nvidia,tegra20-emc
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| /openbmc/qemu/docs/devel/ |
| H A D | secure-coding-practices.rst | 5 be aware of so that they can develop safe code and audit existing code
9 -----------------------
15 ---------------------------------
29 * Use-after-free and double-free
39 ----------------
62 unit = &mydev->unit[val]; <-- this input wasn't validated!
67 If ``val`` is not in range [0, 1] then an out-of-bounds memory access will take
68 place when ``unit`` is dereferenced. The code must check that ``val`` is 0 or
72 --------------------------
74 moments. Device emulation code must not assume that the guest follows the
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| /openbmc/linux/Documentation/admin-guide/ |
| H A D | ramoops.rst | 9 ------------
11 Ramoops is an oops/panic logger that writes its logs to RAM before the system
13 needs a system with persistent RAM so that the content of that area can
17 ----------------
28 mapping to pgprot_writecombine. Setting ``mem_type=1`` attempts to use
54 to life (i.e. a watchdog triggered). In such cases, RAM may be somewhat
58 ----------------------
62 A. Use the module parameters (which have the names of the variables described
64 boot and then use the reserved memory for ramoops. For example, assuming a
66 the kernel to use only the first 128 MB of memory, and place ECC-protected
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| /openbmc/linux/Documentation/scsi/ |
| H A D | ChangeLog.ncr53c8xx | 1 Sat May 12 12:00 2001 Gerard Roudier (groudier@club-internet.fr)
2 * version ncr53c8xx-3.4.3b
3 - Ensure LEDC bit in GPCNTL is cleared when reading the NVRAM.
4 Fix sent by Stig Telfer <stig@api-networks.com>.
5 - Define scsi_set_pci_device() as nil for kernel < 2.4.4.
7 Mon Feb 12 22:30 2001 Gerard Roudier (groudier@club-internet.fr)
8 * version ncr53c8xx-3.4.3
9 - Call pci_enable_device() as AC wants this to be done.
10 - Get both the BAR cookies actual and PCI BAR values.
12 - Merge changes for linux-2.4 that declare the host template
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| /openbmc/u-boot/ |
| H A D | README | 1 # SPDX-License-Identifier: GPL-2.0+
3 # (C) Copyright 2000 - 2013
9 This directory contains the source code for U-Boot, a boot loader for
13 code.
15 The development of U-Boot is closely related to Linux: some parts of
16 the source code originate in the Linux source tree, we have some
24 code (for instance hardware test utilities) to the monitor, you can
37 scattered throughout the U-Boot source identifying the people or
41 actual U-Boot source tree; however, it can be created dynamically
51 U-Boot, you should send a message to the U-Boot mailing list at
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| /openbmc/qemu/docs/system/arm/ |
| H A D | virt.rst | 5 real hardware; it is designed for use in virtual machines.
8 idiosyncrasies and limitations of a particular bit of real-world
16 ``virt-5.0`` machine type will behave like the ``virt`` machine from
17 the QEMU 5.0 release, and migration should work between ``virt-5.0``
18 of the 5.0 release and ``virt-5.0`` of the 5.1 release. Migration
20 the non-versioned ``virt`` machine type.
27 - PCI/PCIe devices
28 - Flash memory
29 - Either one or two PL011 UARTs for the NonSecure World
30 - An RTC
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| /openbmc/openbmc/poky/documentation/ref-manual/ |
| H A D | terms.rst | 1 .. SPDX-License-Identifier: CC-BY-SA-2.0-UK
18 must use the same root filename. The filenames can differ only in the
23 similarly-named recipe file. For an example of an append file in use, see
24 the ":ref:`dev-manual/layers:appending other layers metadata with your layer`"
27 When you name an append file, you can use the "``%``" wildcard character
37 .. code-block:: shell
47 The use of the "%" character is limited in that it only works
49 name. You cannot use the wildcard character in any other location of
60 the :doc:`/bsp-guide/index`.
66 (i.e. :ref:`ref-manual/structure:\`\`oe-init-build-env\`\``). The
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| /openbmc/u-boot/arch/arm/lib/ |
| H A D | crt0.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * crt0 - C-runtime startup Code for ARM U-Boot
9 #include <asm-offsets.h>
14 * This file handles the target-independent stages of the U-Boot
15 * start-up where a C runtime environment is needed. Its entry point
23 * available RAM (SRAM, locked cache...). In this context, VARIABLE
29 * execution from system RAM (DRAM, DDR...) As system RAM may not
30 * be available yet, , board_init_f() must use the current GD to
36 * ones allocated by board_init_f() in system RAM, but BSS and
37 * initialized non-const data are still not available.
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