Home
last modified time | relevance | path

Searched full:usart1 (Results 1 – 25 of 109) sorted by relevance

12345

/openbmc/u-boot/arch/arm/dts/
H A Dstm32f769-disco.dts62 serial0 = &usart1;
95 usart1_pins_a: usart1@0 {
203 &usart1 {
H A Dstm32746g-eval.dts65 serial0 = &usart1;
98 usart1_pins_a: usart1@0 {
194 &usart1 {
H A Dstm32h743i-eval.dts62 serial0 = &usart1;
77 &usart1 {
H A Dstm32f429-disco.dts63 serial0 = &usart1;
111 &usart1 {
H A Dstm32f746-disco.dts67 serial0 = &usart1;
131 usart1_pins_a: usart1@0 {
254 &usart1 {
H A Dsama5d3xmb_cmp.dtsi82 usart1: serial@f0020000 { label
83 dmas = <0>, <0>; /* Do not use DMA for usart1 */
H A Dsama5d3xmb.dtsi86 usart1: serial@f0020000 { label
87 dmas = <0>, <0>; /* Do not use DMA for usart1 */
H A Dstm32429i-eval.dts27 serial0 = &usart1;
261 &usart1 {
H A Dstm32f7-u-boot.dtsi10 usart1_pins_a: usart1@0 {
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Danimeo_ip.dts16 serial0 = &usart1;
63 usart1: serial@fffb4000 { label
H A Dsama5d3xmb.dtsi77 usart1: serial@f0020000 { label
78 dmas = <0>, <0>; /* Do not use DMA for usart1 */
H A Dat91-kizbox2-2.dts20 &usart1 {
H A Dsama5d3xmb_cmp.dtsi76 usart1: serial@f0020000 { label
77 dmas = <0>, <0>; /* Do not use DMA for usart1 */
H A Dat91sam9261.dtsi24 serial2 = &usart1;
194 usart1: serial@fffb4000 { label
356 usart1 {
357 pinctrl_usart1: usart1-0 {
H A Dat91-dvk_som60.dts44 &usart1 {
H A Dat91-cosino_mega2560.dts51 &usart1 {
/openbmc/u-boot/doc/device-tree-bindings/pinctrl/
H A Dst,stm32-pinctrl.txt115 usart1_pins_a: usart1@0 {
129 &usart1 {
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32f769-disco.dts64 serial0 = &usart1;
152 &usart1 {
H A Dstm32h743i-eval.dts62 serial0 = &usart1;
147 &usart1 {
H A Dstm32f746-disco.dts78 serial0 = &usart1;
185 &usart1 {
H A Dstm32746g-eval.dts64 serial0 = &usart1;
209 &usart1 {
H A Dstm32mp157c-phycore-stm32mp1-3.dts26 serial2 = &usart1;
H A Dstm32mp13-pinctrl.dtsi309 usart1_pins_a: usart1-0 {
324 usart1_idle_pins_a: usart1-idle-0 {
341 usart1_sleep_pins_a: usart1-sleep-0 {
H A Dstm32f429-disco.dts70 serial0 = &usart1;
220 &usart1 {
/openbmc/qemu/tests/qtest/
H A Dstm32l4x5_usart-test.c158 /* Enable the clock for USART1 (cf p.259) */ in init_clocks()
165 /* Set PCLK as the clock for USART1(cf p.272) i.e. reset both bits */ in init_clocks()
168 /* Reset USART1 (see p.249) */ in init_clocks()

12345