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/openbmc/linux/Documentation/devicetree/bindings/nvmem/
H A Du-boot,env.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/nvmem/u-boot,env.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: U-Boot environment variables
10 U-Boot uses environment variables to store device parameters and
14 Data is stored using U-Boot specific formats (variant specific header and NUL
15 separated key-value pairs).
21 This binding allows marking storage device (as containing env data) and
30 - Rafał Miłecki <rafal@milecki.pl>
[all …]
/openbmc/u-boot/include/environment/ti/
H A Ddfu.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com
13 "boot part 0 1;" \
17 "u-boot.img.raw raw 0x300 0x1000;" \
18 "u-env.raw raw 0x1300 0x200;" \
19 "spl-os-args.raw raw 0x1500 0x200;" \
20 "spl-os-image.raw raw 0x1700 0x6900;" \
21 "spl-os-args fat 0 1;" \
22 "spl-os-image fat 0 1;" \
23 "u-boot.img fat 0 1;" \
[all …]
/openbmc/u-boot/doc/device-tree-bindings/
H A Dconfig.txt2 ----------------------------------------
4 A number of run-time configuration options are provided in the /config node
10 silent-console
11 If present and non-zero, the console is silenced by default on boot.
13 no-keyboard
14 Tells U-Boot not to expect an attached keyboard with a VGA console
16 u-boot,efi-partition-entries-offset
24 u-boot,mmc-env-partition
29 if u-boot,mmc-env-offset* is present, this setting will take
31 mmc-env-offset* will be tried.
[all …]
/openbmc/openbmc/poky/meta/recipes-bsp/u-boot/
H A Du-boot.inc1 SUMMARY = "Universal Boot Loader for embedded devices"
6 DEPENDS += "${@bb.utils.contains('UBOOT_ENV_SUFFIX', 'scr', 'u-boot-mkimage-native', '', d)}"
8 inherit uboot-config uboot-extlinux-config uboot-sign deploy python3native kernel-arch
10 DEPENDS += "swig-native"
13 …cc ${TOOLCHAIN_OPTIONS} ${@bb.utils.contains('DISTRO_FEATURES', 'ld-is-gold', ' -fuse-ld=bfd ', ''…
18 # u-boot will compile its own tools during the build, with specific
21 PACKAGECONFIG[openssl] = ",,openssl-native"
23 CVE_PRODUCT = "denx:u-boot"
26 # u-boot build system and appended to the u-boot version. If the .scmversion
30 # Default name of u-boot initial env, but enable individual recipes to change
[all …]
/openbmc/u-boot/doc/
H A DREADME.srio-pcie-boot-corenet1 ---------------------------------------
2 SRIO and PCIE Boot on Corenet Platforms
3 ---------------------------------------
5 For some PowerPC processors with SRIO or PCIE interface, boot location can be
7 do without flash for u-boot image, ucode and ENV. All the images can be fetched
12 platforms and a RCW example with boot from SRIO or PCIE configuration.
14 Environment of the SRIO or PCIE boot:
19 U-Boot images, UCodes will be stored in this flash.
21 e) Slave's RCW should configure the SerDes for SRIO or PCIE boot port, set
22 the boot location to SRIO or PCIE, and holdoff all the cores.
[all …]
/openbmc/u-boot/board/freescale/t208xqds/
H A DREADME1 The T2080QDS is a high-performance computing evaluation, development and
5 ------------------
6 The T2080 QorIQ multicore processor combines four dual-threaded e6500 Power
7 Architecture processor cores with high-performance datapath acceleration
12 - Four dual-threads 64-bit Power architecture e6500 cores, up to 1.8GHz
13 - 2MB L2 cache and 512KB CoreNet platform cache (CPC)
14 - Hierarchical interconnect fabric
15 - One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving
16 - Data Path Acceleration Architecture (DPAA) incorporating acceleration
17 - 16 SerDes lanes up to 10.3125 GHz
[all …]
/openbmc/openbmc/meta-aspeed/recipes-bsp/u-boot/
H A Du-boot-aspeed-sdk_2019.04.bb1 require u-boot-common-aspeed-sdk_${PV}.inc
5 require recipes-bsp/u-boot/u-boot.inc
7 PROVIDES += "u-boot"
8 DEPENDS += "bc-native dtc-native"
10 SRC_URI:append:df-phosphor-mmc = " file://u-boot-env-ast2600.txt"
19 SOCSEC_SIGN_EXTRA_OPTS ?= "--stack_intersects_verification_region=false --rsa_key_order=big"
23 inherit socsec-sign
26 UBOOT_ENV_SIZE:df-phosphor-mmc = "0x10000"
27 UBOOT_ENV:df-phosphor-mmc = "u-boot-env"
28 UBOOT_ENV_SUFFIX:df-phosphor-mmc = "bin"
[all …]
H A Du-boot-fw-utils-aspeed_2016.07.bb1 require u-boot-common-aspeed_${PV}.inc
3 SRC_URI += "file://default-gcc.patch"
7 SUMMARY = "U-Boot bootloader fw_printenv/setenv utilities"
8 DEPENDS += "mtd-utils"
10 PROVIDES += "u-boot-fw-utils"
12 INSANE_SKIP:${PN} = "already-stripped"
13 EXTRA_OEMAKE:class-target = 'CROSS_COMPILE=${TARGET_PREFIX} CC="${CC} ${CFLAGS} ${LDFLAGS}" HOSTCC=…
14 EXTRA_OEMAKE:class-cross = 'ARCH=${TARGET_ARCH} CC="${CC} ${CFLAGS} ${LDFLAGS}" V=1'
16 inherit uboot-config
20 oe_runmake env
[all …]
/openbmc/u-boot/include/configs/
H A Dls1043a_common.h1 /* SPDX-License-Identifier: GPL-2.0+ */
64 /* SD boot SPL */
82 * with U-Boot image. Here u-boot max. size is 512K. So if binary
83 * size increases then increase this size in case of secure boot as
84 * it uses raw u-boot image instead of fit image.
112 * with U-Boot image. Here u-boot max. size is 512K. So if binary
113 * size increases then increase this size in case of secure boot as
114 * it uses raw u-boot image instead of fit image.
197 * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
198 * about 1MB (2040 blocks), Env is stored after the image, and the env size is
[all …]
H A Dapf27.h1 /* SPDX-License-Identifier: GPL-2.0+ */
6 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
28 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
32 /* NAND boot config */
36 #define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800
45 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
62 + PHYS_SDRAM_1_SIZE - 0x0100000)
82 * U-Boot general configurations
86 /* Boot argument buffer size */
90 * Boot Linux
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H A Dplatinum.h1 /* SPDX-License-Identifier: GPL-2.0+ */
11 /* Location in NAND to read U-Boot from */
56 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
93 * U-Boot configuration
100 PHYS_SDRAM_SIZE - (12 << 20))
115 "setubipartition=env set ubipartition ubi\0" \
116 "setubirfs=env set ubirfs $ubipartition:rootfs$boot_vol\0"
119 "setubipartition=env set ubipartition ubi$boot_vol\0" \
120 "setubirfs=env set ubirfs ubi0:rootfs\0"
127 "dtb="CONFIG_PLATINUM_CPU"-platinum-"CONFIG_PLATINUM_PROJECT".dtb\0" \
[all …]
H A Dat91sam9x5ek.h1 /* SPDX-License-Identifier: GPL-2.0+ */
29 * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0)
38 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
74 /* bootstrap + u-boot + env + linux in nandflash */
81 "bootz 0x22000000 - 0x21000000"
83 /* bootstrap + u-boot + env + linux in spi flash */
91 /* bootstrap + u-boot + env + linux in data flash */
99 /* bootstrap + u-boot + env + linux in mmc */
127 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
H A Dopos6uldev.h1 /* SPDX-License-Identifier: GPL-2.0+ */
32 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
70 /* Environment is stored in the eMMC boot partition */
81 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
101 "kernelimg=" __stringify(CONFIG_BOARD_NAME) "-linux.bin\0" \
103 "check_env=if test -n ${flash_env_version}; " \
104 "then env default env_version; " \
105 "else env set flash_env_version ${env_version}; env save; " \
108 "echo \"*** Warning - Environment version" \
110 "env default flash_reset_env; " \
[all …]
/openbmc/u-boot/test/py/tests/
H A Dtest_env.py1 # SPDX-License-Identifier: GPL-2.0
3 # Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
13 """Container that represents the state of all U-Boot environment variables.
14 This enables quick determination of existant/non-existant variable
22 u_boot_console: A U-Boot console.
33 """Read all current environment variables from U-Boot.
48 self.env = {}
53 self.env[var] = value
65 for var in self.env:
81 if var not in self.env:
[all …]
H A Dtest_dfu.py1 # SPDX-License-Identifier: GPL-2.0
4 # Test U-Boot's "dfu" command. The test starts DFU in U-Boot, waits for USB
5 # device enumeration on the host, executes dfu-util multiple times to test
7 # finally aborts the "dfu" command in U-Boot.
25 'host_usb_dev_node': '/dev/usbdev-p2371-2180',
28 'host_usb_port_path': '3-13',
77 ACTION=="add", SUBSYSTEM=="block", SUBSYSTEMS=="usb", KERNELS=="3-13", MODE:="666"
87 ENV{ID_PATH}=="?*", ENV{.ID_PORT}=="", SYMLINK+="bus/usb/by-path/$env{ID_PATH}"
88 ENV{ID_PATH}=="?*", ENV{.ID_PORT}=="?*", SYMLINK+="bus/usb/by-path/$env{ID_PATH}-port$env{.ID_PORT}"
91 # The set of file sizes to test. These values trigger various edge-cases such
[all …]
/openbmc/openbmc/meta-nuvoton/recipes-bsp/u-boot/
H A Du-boot-fw-utils-nuvoton_2023.10.bb1 require u-boot-common-nuvoton_${PV}.inc
2 require recipes-bsp/u-boot/u-boot-configure.inc
4 SUMMARY = "U-Boot bootloader fw_printenv/setenv utilities"
5 DEPENDS += "mtd-utils bison-native"
6 RDEPENDS:${PN} = "udev-nuvoton-mtd-partitions"
8 PROVIDES += "u-boot-fw-utils"
11 INSANE_SKIP:${PN} = "already-stripped"
13 EXTRA_OEMAKE:class-target = 'CROSS_COMPILE="${TARGET_PREFIX}" HOSTCC="${BUILD_CC} ${BUILD_FLAGS} ${…
14 EXTRA_OEMAKE:class-cross = 'ARCH=${TARGET_ARCH} CC="${CC} ${CFLAGS} ${LDFLAGS}" V=1'
16 inherit uboot-config
[all …]
H A Du-boot-fw-utils-nuvoton_2021.04.bb1 require u-boot-common-nuvoton_${PV}.inc
2 require recipes-bsp/u-boot/u-boot-configure.inc
4 SUMMARY = "U-Boot bootloader fw_printenv/setenv utilities"
5 DEPENDS += "mtd-utils bison-native"
6 RDEPENDS:${PN} = "udev-nuvoton-mtd-partitions"
8 PROVIDES += "u-boot-fw-utils"
11 INSANE_SKIP:${PN} = "already-stripped"
13 EXTRA_OEMAKE:class-target = 'CROSS_COMPILE="${TARGET_PREFIX}" HOSTCC="${BUILD_CC} ${BUILD_FLAGS} ${…
14 EXTRA_OEMAKE:class-cross = 'ARCH=${TARGET_ARCH} CC="${CC} ${CFLAGS} ${LDFLAGS}" V=1'
16 inherit uboot-config
[all …]
/openbmc/u-boot/board/freescale/t102xrdb/
H A DREADME2 ------------------
4 combines two or one 64-bit Power Architecture e5500 core respectively with high
9 and general-purpose embedded computing. Its high level of integration offers
14 - two e5500 cores, each with a private 256 KB L2 cache
15 - Up to 1.4 GHz with 64-bit ISA support (Power Architecture v2.06-compliant)
16 - Three levels of instructions: User, supervisor, and hypervisor
17 - Independent boot and reset
18 - Secure boot capability
19 - 256 KB shared L3 CoreNet platform cache (CPC)
20 - Interconnect CoreNet platform
[all …]
/openbmc/qemu/hw/ppc/
H A Dsam460ex.c5 * Copyright (c) 2016-2019 BALATON Zoltan
17 #include "qemu/error-report.h"
23 #include "sysemu/block-backend.h"
24 #include "exec/page-protection.h"
29 #include "hw/pci-host/ppc4xx.h"
34 #include "hw/char/serial-mm.h"
38 #include "hw/usb/hcd-ehci.h"
40 #include "hw/qdev-properties.h"
41 #include "hw/intc/ppc-uic.h"
46 #define UBOOT_FILENAME "u-boot-sam460-20100605.bin"
[all …]
/openbmc/u-boot/tools/buildman/
H A Dbuilderthread.py1 # SPDX-License-Identifier: GPL-2.0+
15 RETURN_CODE_RETRY = -1
76 """This thread builds U-Boot for a particular board.
78 An input queue provides each new job. We run 'make' to build U-Boot
83 thread_num: Our thread number (0-n-1), used to decide on a
104 mrproper - can be called to clean source
105 config - called to configure for a board
106 build - the main make invocation - it does the build
121 the build and just return the previously-saved results.
124 commit_upto: Commit number to build (0...n-1)
[all …]
/openbmc/u-boot/board/gateworks/gw_ventana/
H A DREADME1 U-Boot for the Gateworks Ventana Product Family boards
3 This file contains information for the port of U-Boot to the Gateworks
7 is supported by a single bootloader build by using a common SPL and U-Boot
10 all of the various boot mediums available.
13 ---------------------------------
15 The i.MX6 has a BOOT ROM PPL (Primary Program Loader) which supports loading
16 an executable image from various boot devices.
19 will build the following artifacts from U-Boot source:
20 - SPL - Secondary Program Loader that the i.MX6 BOOT ROM (Primary Program
22 The DRAM controller, loads u-boot.img from the detected boot device,
[all …]
/openbmc/u-boot/board/freescale/t208xrdb/
H A DREADME1 T2080PCIe-RDB is a Freescale Reference Design Board that hosts the T2080 SoC.
5 ------------------
6 The T2080 QorIQ multicore processor combines four dual-threaded e6500 Power
7 Architecture processor cores with high-performance datapath acceleration
12 - Four dual-threads 64-bit Power architecture e6500 cores, up to 1.8GHz
13 - 2MB L2 cache and 512KB CoreNet platform cache (CPC)
14 - Hierarchical interconnect fabric
15 - One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving
16 - Data Path Acceleration Architecture (DPAA) incorporating acceleration
17 - 16 SerDes lanes up to 10.3125 GHz
[all …]
/openbmc/u-boot/board/theobroma-systems/puma_rk3399/
H A Dpuma-rk3399.c1 // SPDX-License-Identifier: GPL-2.0+
14 #include <dm/uclass-internal.h>
24 #include <u-boot/sha256.h>
36 debug("%s: Cannot enable boot on regulator\n", __func__); in board_init()
46 debug("%s: trying to force a power-on reset\n", __func__); in rk3399_force_power_on_reset()
54 if (gpio_request_by_name_nodev(node, "sysreset-gpio", 0, in rk3399_force_power_on_reset()
56 debug("%s: could not find a /config/sysreset-gpio\n", __func__); in rk3399_force_power_on_reset()
71 * This may cause issues during boot-up for some configurations of in spl_board_init()
75 * a power-on reset and (if not) issue an overtemp-reset to reset in spl_board_init()
79 * that could generate a software reset (e.g. U-Boot's sysreset in spl_board_init()
[all …]
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Dopenbmc-flash-layout.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 compatible = "fixed-partitions";
5 #address-cells = <1>;
6 #size-cells = <1>;
8 u-boot@0 {
10 label = "u-boot";
13 u-boot-env@60000 {
15 label = "u-boot-env";
/openbmc/u-boot/board/freescale/t102xqds/
H A DREADME2 ------------------
4 combines two or one 64-bit Power Architecture e5500 core respectively with high
9 and general-purpose embedded computing. Its high level of integration offers
14 - two e5500 cores, each with a private 256 KB L2 cache
15 - Up to 1.4 GHz with 64-bit ISA support (Power Architecture v2.06-compliant)
16 - Three levels of instructions: User, supervisor, and hypervisor
17 - Independent boot and reset
18 - Secure boot capability
19 - 256 KB shared L3 CoreNet platform cache (CPC)
20 - Interconnect CoreNet platform
[all …]

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