/openbmc/linux/Documentation/devicetree/bindings/mmc/ |
H A D | fsl-imx-esdhc.yaml | 128 fsl,tuning-start-tap: 131 Specify the start delay cell point when send first CMD19 in tuning procedure. 134 fsl,tuning-step: 137 Specify the increasing delay cell steps in tuning procedure. 138 The uSDHC use one delay cell as default increasing step to do tuning process. 139 This property allows user to change the tuning step to more than one delay 141 tuning step can't find the proper delay window within limited tuning retries.
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H A D | rockchip-dw-mshc.yaml | 72 to control the clock phases, "ciu-sample" is required for tuning 85 low speeds or in case where all phases work at tuning time. 94 The desired number of times that the host execute tuning when needed. 95 If not specified, the host will do tuning for 360 times, 96 namely tuning for each degree.
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/openbmc/phosphor-pid-control/ |
H A D | tuning.md | 1 # PID Control Tuning & Logging 10 ## Tuning Fan PID Using a Fixed RPM Setpoint 18 ## Tuning Fan PID Control Parameters 60 ## Fan RPM Tuning Helper script 66 ## Thermal Tuning Example 72 3. (Option 2) If sweeping fan setpoint, using the tuning helper script
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H A D | README.md | 103 ### Enabling Logging & Tuning 110 To enable tuning, pass "-t" on the command line. 112 See [Logging & Tuning](tuning.md) for more information.
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H A D | main.cpp | 27 #include "pid/tuning.hpp" 322 app.add_flag("-t,--tuning", tuningEnabled, "Enable or disable tuning"); in main() 330 static constexpr auto tuningEnablePath = "/etc/thermal.d/tuning"; in main() 371 // If this file exists, enable tuning at runtime in main() 378 std::cerr << "Tuning enabled\n"; in main()
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/openbmc/openbmc/poky/meta/conf/machine/include/ |
H A D | README | 15 AVAILTUNES - This is a list of all of the tuning definitions currently 18 configuration. Each tuning file can add to this list using "+=", but 27 explanation for what it does. All architectural, cpu, abi, etc tuning 32 tuning ends up with features which conflict with each other. 45 or other tuning setting, such as TARGET_FPU. Any ABI extensions either 62 define the architecture, abi and tuning of a particular package.
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/openbmc/linux/Documentation/userspace-api/media/dvb/ |
H A D | fe-set-frontend.rst | 31 Points to parameters for tuning operation. 36 This ioctl call starts a tuning operation using specified parameters. 38 and the tuning could be initiated. The result of the tuning operation in
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/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | realtek,usb3phy.yaml | 69 realtek,amplitude-control-coarse-tuning: 72 This value is a parameter for coarse tuning. 80 realtek,amplitude-control-fine-tuning: 83 This value is used for fine-tuning parameters. 106 realtek,amplitude-control-coarse-tuning = <0x77>;
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H A D | qcom,qusb2-phy.yaml | 79 tuning parameter value for qusb2 phy. 90 tuning parameter that may vary for different boards of same SOC. 99 tuning parameter that may vary for different boards of same SOC. 108 tuning parameter that may vary for different boards of same SOC. 116 It is a 4 bit value that specifies tuning for HSTX 148 It is a 2 bit value tuning parameter that control disconnect
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H A D | phy-stm32-usbphyc.yaml | 114 st,enable-fs-rftime-tuning: 115 description: Enables the FS rise/fall tuning option 148 Controls HS driver impedance tuning for choke compensation 255 st,enable-fs-rftime-tuning; 273 st,enable-fs-rftime-tuning;
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/openbmc/linux/drivers/ata/ |
H A D | pata_cs5530.c | 49 u32 tuning; in cs5530_set_piomode() local 53 tuning = ioread32(base + 0x04); in cs5530_set_piomode() 54 format = (tuning & 0x80000000UL) ? 1 : 0; in cs5530_set_piomode() 76 u32 tuning, timing = 0; in cs5530_set_dmamode() local 80 tuning = ioread32(base + 0x04); in cs5530_set_dmamode() 99 timing |= (tuning & 0x80000000UL); in cs5530_set_dmamode() 104 tuning |= 0x00100000; /* UDMA for both */ in cs5530_set_dmamode() 106 tuning &= ~0x00100000; /* MWDMA for both */ in cs5530_set_dmamode() 107 iowrite32(tuning, base + 0x04); in cs5530_set_dmamode()
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/openbmc/linux/drivers/mmc/host/ |
H A D | sdhci-esdhc-imx.c | 70 /* Tuning bits */ 106 /* NOTE: the minimum valid tuning start tap for mx6sl is 1 */ 154 /* The IP supports manual tuning process */ 156 /* The IP supports standard tuning process */ 231 unsigned int tuning_step; /* The delay cell steps in tuning procedure */ 232 unsigned int tuning_start_tap; /* The start delay cell point in tuning procedure */ 447 /* Enable the auto tuning circuit to check the CMD line and BUS line */ 470 * For USDHC, auto tuning circuit can not handle the async sdio in usdhc_auto_tuning_mode_sel_and_en() 473 * tuning circuit check these 4 data lines, include the DAT[1], in usdhc_auto_tuning_mode_sel_and_en() 477 * device, config the auto tuning circuit only check DAT[0] and CMD in usdhc_auto_tuning_mode_sel_and_en() [all …]
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H A D | sdhci-of-esdhc.c | 436 /* Starting SW tuning requires ESDHC_SMPCLKSEL to be set in esdhc_be_writew() 462 /* Starting SW tuning requires ESDHC_SMPCLKSEL to be set in esdhc_le_writew() 1050 /* Program the software tuning mode by setting TBCTL[TB_MODE]=2'h3 */ in esdhc_execute_sw_tuning() 1073 /* For tuning mode, the sd clock divisor value in esdhc_execute_tuning() 1084 * during tuning. If the SD card is too slow sending the response, the in esdhc_execute_tuning() 1086 * is triggered. This leads to tuning errors. in esdhc_execute_tuning() 1100 /* Do HW tuning */ in esdhc_execute_tuning() 1110 /* For type2 affected platforms of the tuning erratum, in esdhc_execute_tuning() 1111 * tuning may succeed although eSDHC might not have in esdhc_execute_tuning() 1112 * tuned properly. Need to check tuning window. in esdhc_execute_tuning() [all …]
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/openbmc/u-boot/drivers/mmc/ |
H A D | renesas-sdhi.c | 182 unsigned long tap_cnt; /* counter of tuning success */ in renesas_sdhi_select_tuning() 183 unsigned long tap_start;/* start position of tuning success */ in renesas_sdhi_select_tuning() 184 unsigned long tap_end; /* end position of tuning success */ in renesas_sdhi_select_tuning() 185 unsigned long ntap; /* temporary counter of tuning success */ in renesas_sdhi_select_tuning() 273 /* Enable auto re-tuning */ in renesas_sdhi_select_tuning() 295 /* clock tuning is not needed for upto 52MHz */ in renesas_sdhi_execute_tuning() 304 /* Tuning is not supported */ in renesas_sdhi_execute_tuning() 309 … "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n"); in renesas_sdhi_execute_tuning() 317 /* Force PIO for the tuning */ in renesas_sdhi_execute_tuning() 339 dev_warn(dev, "Tuning procedure failed\n"); in renesas_sdhi_execute_tuning() [all …]
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/openbmc/phosphor-pid-control/test/ |
H A D | meson.build | 52 '../pid/tuning.cpp', 56 '../pid/tuning.cpp', 62 '../pid/tuning.cpp', 70 '../pid/tuning.cpp',
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/openbmc/linux/Documentation/devicetree/bindings/iio/proximity/ |
H A D | ams,as3935.yaml | 31 ams,tuning-capacitor-pf: 34 Calibration tuning capacitor stepping value. This will require using 70 ams,tuning-capacitor-pf = <80>;
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/openbmc/linux/include/linux/mmc/ |
H A D | host.h | 178 /* The tuning command opcode value is different for SD and eMMC cards */ 184 /* Execute HS400 tuning depending host driver */ 187 /* Optional callback to prepare for SD high-speed tuning */ 190 /* Optional callback to execute SD high-speed tuning */ 452 unsigned int doing_init_tune:1; /* initial tuning in progress */ 453 unsigned int can_retune:1; /* re-tuning can be used */ 454 unsigned int doing_retune:1; /* re-tuning in progress */ 455 unsigned int retune_now:1; /* do re-tuning at next req */ 456 unsigned int retune_paused:1; /* re-tuning is temporarily disabled */ 464 int need_retune; /* re-tuning is needed */ [all …]
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/openbmc/linux/Documentation/ABI/testing/ |
H A D | sysfs-fs-ext4 | 15 requests to a multiple of this tuning parameter if the 36 Tuning parameter which controls the minimum size for 55 Tuning parameter which controls the maximum number of 87 Tuning parameter which (if non-zero) controls the goal
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/openbmc/u-boot/arch/arm/dts/ |
H A D | imx7d-sdb.dts | 374 fsl,tuning-start-tap = <20>; 375 fsl,tuning-step= <2>; 385 fsl,tuning-start-tap = <20>; 386 fsl,tuning-step= <2>; 397 fsl,tuning-start-tap = <20>; 398 fsl,tuning-step= <2>;
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/openbmc/linux/drivers/net/wireless/ralink/rt2x00/ |
H A D | rt2x00link.c | 10 Abstract: rt2x00 generic link tuning routines. 232 * While scanning, link tuning is disabled. By default in rt2x00link_start_tuner() 265 * device should only perform link tuning during the in rt2x00link_reset_tuner() 309 * Update quality RSSI for link tuning, in rt2x00link_tuner_sta() 320 * Check if link tuning is supported by the hardware, some hardware in rt2x00link_tuner_sta() 321 * do not support link tuning at all, while other devices can disable in rt2x00link_tuner_sta() 349 * immediately cease all link tuning. in rt2x00link_tuner()
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/openbmc/linux/drivers/staging/iio/Documentation/ |
H A D | sysfs-bus-iio-dds | 6 Stores frequency into tuning word Y. 10 can control the desired active tuning word by writing Y to the 26 Specifies the active output frequency tuning word. The value
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/openbmc/qemu/hw/misc/ |
H A D | allwinner-a10-ccm.c | 34 REG_PLL1_TUN = 0x0004, /* PLL1 Tuning */ 36 REG_PLL2_TUN = 0x000C, /* PLL2 Tuning */ 40 REG_PLL5_TUN = 0x0024, /* PLL5 Tuning */ 42 REG_PLL6_TUN = 0x002C, /* PLL6 Tuning */
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/openbmc/linux/drivers/staging/iio/frequency/ |
H A D | ad9832.h | 17 * @freq0: power up freq0 tuning word in Hz 18 * @freq1: power up freq1 tuning word in Hz
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/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/inc/ |
H A D | smu_v13_0_pptable.h | 70 …URE_MEMORY_TIMING_TUNE = 1 << SMU_13_0_ODCAP_MEMORY_TIMING_TUNE, //AC Timing Tuning feature 153 …od_turbo_power_limit; //Power limit setting for Turbo mode in Performance UI Tuning. 154 …e_power_limit; //Power limit setting for PowerSave/Optimal mode in Performance UI Tuning.
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H A D | smu_v11_0_pptable.h | 70 …URE_MEMORY_TIMING_TUNE = 1 << SMU_11_0_ODCAP_MEMORY_TIMING_TUNE, //AC Timing Tuning feature 151 …od_turbo_power_limit; //Power limit setting for Turbo mode in Performance UI Tuning. 152 …e_power_limit; //Power limit setting for PowerSave/Optimal mode in Performance UI Tuning.
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