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/openbmc/linux/drivers/soc/fsl/qe/
H A Dtsa.c3 * TSA driver
10 #include "tsa.h"
11 #include <dt-bindings/soc/cpm1-fsl,tsa.h>
21 /* TSA SI RAM routing tables entry */
118 struct tsa { struct
132 static inline struct tsa *tsa_serial_get_tsa(struct tsa_serial *tsa_serial) in tsa_serial_get_tsa() argument
135 return container_of(tsa_serial, struct tsa, serials[tsa_serial->id]); in tsa_serial_get_tsa()
165 struct tsa *tsa = tsa_serial_get_tsa(tsa_serial); in tsa_serial_connect() local
184 dev_err(tsa->dev, "Unsupported serial id %u\n", tsa_serial->id); in tsa_serial_connect()
188 spin_lock_irqsave(&tsa->lock, flags); in tsa_serial_connect()
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H A Dtsa.h3 * TSA management
25 /* Connect and disconnect the TSA serial */
H A DKconfig37 tristate "CPM TSA support"
41 Freescale CPM Time Slot Assigner (TSA)
H A Dqmc.c22 #include "tsa.h"
77 /* TSA entry (16bit entry in TSATRX and TSATTX) */
261 /* Retrieve info from the TSA related serial */ in qmc_chan_get_info()
750 /* Retrieve info from the TSA related serial */ in qmc_check_chans()
756 dev_err(qmc->dev, "Number of TSA Tx/Rx TS assigned not supported\n"); in qmc_check_chans()
766 dev_err(qmc->dev, "Number of TSA Tx/Rx TS assigned are not equal\n"); in qmc_check_chans()
777 dev_err(qmc->dev, "chan %u uses TSA unassigned Tx TS\n", chan->id); in qmc_check_chans()
786 dev_err(qmc->dev, "chan %u uses TSA unassigned Rx TS\n", chan->id); in qmc_check_chans()
1001 /* Retrieve info from the TSA related serial */ in qmc_setup_tsa()
1022 /* Retrieve info from the TSA related serial */ in qmc_setup_chan_trnsync()
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H A Ducc_slow.c297 /* Set Tsa or NMSI mode. */ in ucc_slow_init()
298 ucc_set_qe_mux_tsa(us_info->ucc_num, us_info->tsa); in ucc_slow_init()
299 /* If NMSI (not Tsa), set Tx and Rx clock. */ in ucc_slow_init()
300 if (!us_info->tsa) { in ucc_slow_init()
H A Ducc_fast.c307 /* Set Tsa or NMSI mode. */ in ucc_fast_init()
308 ucc_set_qe_mux_tsa(uf_info->ucc_num, uf_info->tsa); in ucc_fast_init()
309 /* If NMSI (not Tsa), set Tx and Rx clock. */ in ucc_fast_init()
310 if (!uf_info->tsa) { in ucc_fast_init()
H A DMakefile7 obj-$(CONFIG_CPM_TSA) += tsa.o
/openbmc/qemu/include/qemu/
H A Dclang-tsa.h29 * TSA is available since clang 3.6-ish.
32 # define TSA(x) __attribute__((x)) macro
34 # define TSA(x) /* No TSA, make TSA attributes no-ops. */ macro
41 #define TSA_CAPABILITY(x) TSA(capability(x))
48 #define TSA_GUARDED_BY(x) TSA(guarded_by(x))
55 #define TSA_PT_GUARDED_BY(x) TSA(pt_guarded_by(x))
64 #define TSA_REQUIRES(...) TSA(requires_capability(__VA_ARGS__))
65 #define TSA_REQUIRES_SHARED(...) TSA(requires_shared_capability(__VA_ARGS__))
75 #define TSA_EXCLUDES(...) TSA(locks_excluded(__VA_ARGS__))
85 #define TSA_ACQUIRE(...) TSA(acquire_capability(__VA_ARGS__))
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/openbmc/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dfsl,cpm1-scc-qmc.yaml14 serial controller using the same TDM physical interface routed from TSA.
40 fsl,tsa-serial:
44 - description: phandle to TSA node
47 TSA serial interface (dt-bindings/soc/cpm1-fsl,tsa.h defines these
53 Should be a phandle/number pair. The phandle to TSA node and the TSA
95 TSA to this cell.
101 TSA to this cell.
113 - fsl,tsa-serial
121 #include <dt-bindings/soc/cpm1-fsl,tsa.h>
135 fsl,tsa-serial = <&tsa FSL_CPM_TSA_SCC4>;
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H A Dfsl,cpm1-tsa.yaml4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml#
7 title: PowerQUICC CPM Time-slot assigner (TSA) controller
13 The TSA is the time-slot assigner that can be found on some PowerQUICC SoC.
21 - fsl,mpc885-tsa
22 - fsl,mpc866-tsa
23 - const: fsl,cpm1-tsa
128 (dt-bindings/soc/cpm1-fsl,tsa.h defines these values)
174 #include <dt-bindings/soc/cpm1-fsl,tsa.h>
176 tsa@ae0 {
177 compatible = "fsl,mpc885-tsa", "fsl,cpm1-tsa";
/openbmc/linux/drivers/net/ethernet/intel/ixgbevf/
H A Dipsec.c349 struct tx_sa tsa; in ixgbevf_ipsec_add_sa() local
359 memset(&tsa, 0, sizeof(tsa)); in ixgbevf_ipsec_add_sa()
360 tsa.used = true; in ixgbevf_ipsec_add_sa()
361 tsa.xs = xs; in ixgbevf_ipsec_add_sa()
364 tsa.encrypt = xs->ealg || xs->aead; in ixgbevf_ipsec_add_sa()
366 ret = ixgbevf_ipsec_parse_proto_keys(xs, tsa.key, &tsa.salt); in ixgbevf_ipsec_add_sa()
369 memset(&tsa, 0, sizeof(tsa)); in ixgbevf_ipsec_add_sa()
376 tsa.pfsa = ret; in ixgbevf_ipsec_add_sa()
379 memcpy(&ipsec->tx_tbl[sa_idx], &tsa, sizeof(tsa)); in ixgbevf_ipsec_add_sa()
471 struct tx_sa *tsa; in ixgbevf_ipsec_tx() local
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/openbmc/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_ipsec.c706 struct tx_sa tsa; in ixgbe_ipsec_add_sa() local
720 memset(&tsa, 0, sizeof(tsa)); in ixgbe_ipsec_add_sa()
721 tsa.used = true; in ixgbe_ipsec_add_sa()
722 tsa.xs = xs; in ixgbe_ipsec_add_sa()
725 tsa.encrypt = xs->ealg || xs->aead; in ixgbe_ipsec_add_sa()
727 ret = ixgbe_ipsec_parse_proto_keys(xs, tsa.key, &tsa.salt); in ixgbe_ipsec_add_sa()
730 memset(&tsa, 0, sizeof(tsa)); in ixgbe_ipsec_add_sa()
735 memcpy(&ipsec->tx_tbl[sa_idx], &tsa, sizeof(tsa)); in ixgbe_ipsec_add_sa()
737 ixgbe_ipsec_set_tx_sa(hw, sa_idx, tsa.key, tsa.salt); in ixgbe_ipsec_add_sa()
1035 struct tx_sa *tsa; in ixgbe_ipsec_vf_del_sa() local
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/openbmc/qemu/include/block/
H A Dgraph-lock.h23 #include "qemu/clang-tsa.h"
58 /* Dummy lock object to use for Thread Safety Analysis (TSA) */
79 * TSA annotations are not part of function types, so checks are defeated when
187 * Calling this function tells TSA that we know that the lock is effectively
207 * This is not marked as TSA_ACQUIRE_SHARED() because TSA doesn't understand the
229 * @unlock_var can't be unlocked and then set to NULL because TSA wants the lock
258 * This is not marked as TSA_ACQUIRE_SHARED() because TSA doesn't understand the
/openbmc/linux/arch/s390/include/asm/
H A Dfcx.h80 * struct tsa_iostat - I/O-Status Transport-Status Area (IO-Stat TSA)
98 * struct tsa_ddpcs - Device-Detected-Program-Check Transport-Status Area (DDPC TSA)
115 * struct tsa_intrg - Interrogate Transport-Status Area (Intrg. TSA)
159 * @tsa: Transport-Status-Area
171 } __attribute__ ((packed)) tsa; member
/openbmc/linux/drivers/net/wan/
H A Dfsl_ucc_hdlc.c41 .tsa = 0,
96 if (priv->tsa) { in uhdlc_init()
97 uf_info->tsa = 1; in uhdlc_init()
139 if (priv->tsa) in uhdlc_init()
729 if (priv->tsa) in uhdlc_open()
823 if (priv->tsa) in uhdlc_close()
973 if (priv->tsa) in uhdlc_resume()
1030 if (priv->tsa) in uhdlc_resume()
1188 uhdlc_priv->tsa = of_property_read_bool(np, "fsl,tdm-interface"); in ucc_hdlc_probe()
1192 if (uhdlc_priv->tsa == 1) { in ucc_hdlc_probe()
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H A Dfsl_ucc_hdlc.h74 u16 tsa; member
/openbmc/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_dcb.h112 u8 tsa[8]; /* TSA Algorithm[0..7] */ member
/openbmc/linux/drivers/net/netdevsim/
H A Dipsec.c241 struct nsim_sa *tsa; in nsim_ipsec_tx() local
267 tsa = &ipsec->sa[sa_idx]; in nsim_ipsec_tx()
268 if (unlikely(!tsa->used)) { in nsim_ipsec_tx()
/openbmc/linux/drivers/net/ethernet/broadcom/bnxt/
H A Dbnxt_dcb.c117 cos2bw.tsa = in bnxt_hwrm_queue_cos2bw_cfg()
121 cos2bw.tsa = in bnxt_hwrm_queue_cos2bw_cfg()
135 req->queue_id0_tsa_assign = cos2bw.tsa; in bnxt_hwrm_queue_cos2bw_cfg()
170 cos2bw.tsa = resp->queue_id0_tsa_assign; in bnxt_hwrm_queue_cos2bw_qcfg()
181 if (cos2bw.tsa == in bnxt_hwrm_queue_cos2bw_qcfg()
H A Dbnxt_dcb.h30 u8 tsa;
/openbmc/linux/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-dcb.c155 "TC%u: tx_bw=%hhu, rx_bw=%hhu, tsa=%hhu\n", i, in xgbe_dcb_ieee_setets()
174 "unsupported TSA algorithm (%hhu)\n", in xgbe_dcb_ieee_setets()
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dstih407-c8sectpfe.txt72 /* tsin0 is TSA on NIMA */
/openbmc/linux/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_dcb.c690 u8 i, tsa, bw_per; in qlcnic_dcb_fill_cee_pg_params() local
698 tsa = QLC_DCB_GET_TSA_PG(each->pg_tsa_map[0], i); in qlcnic_dcb_fill_cee_pg_params()
701 tsa = QLC_DCB_GET_TSA_PG(each->pg_tsa_map[1], i); in qlcnic_dcb_fill_cee_pg_params()
705 pg_cfg->tsa_type = tsa; in qlcnic_dcb_fill_cee_pg_params()
/openbmc/linux/drivers/net/ethernet/intel/ice/
H A Dice_dcb.h65 /* Defines for IEEE TSA types */
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstihxxx-b2120.dtsi176 /* tsin0 is TSA on NIMA */

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