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/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dnvidia,tegra210-quad.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/nvidia,tegra210-quad.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
14 - $ref: spi-controller.yaml#
19 - nvidia,tegra210-qspi
20 - nvidia,tegra186-qspi
21 - nvidia,tegra194-qspi
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H A Dnvidia,tegra210-quad-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/nvidia,tegra210-quad-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
14 nvidia,tx-clk-tap-delay:
18 QSPI to corresponding slave device.
23 nvidia,rx-clk-tap-delay:
27 QSPI to corresponding slave device.
H A Dspi-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
13 need to be defined in the peripheral node because they are per-peripheral and
19 - Mark Brown <broonie@kernel.org>
27 - minimum: 0
32 spi-cs-high:
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/openbmc/u-boot/drivers/spi/
H A DKconfig16 typically use driver-private data instead of extending the
24 by providing an high-level interface to send memory-like commands.
65 please refer to doc/device-tree-bindings/spi/spi-ath79.txt.
94 Enable the Broadcom set-top box SPI driver. This driver can
99 bool "Cadence QSPI driver"
101 Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
158 bool "Mediatek QSPI driver"
161 Enable the Mediatek QSPI driver. This driver can be
163 Mediatek QSPI IP core.
178 to access the SPI NOR flash, MMC-over-SPI on platforms based on
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H A Dtegra210_qspi.c1 // SPDX-License-Identifier: GPL-2.0+
3 * NVIDIA Tegra210 QSPI controller driver
12 #include <asm/arch-tegra/clk_rst.h>
79 u32 rsvd[56]; /* 028-107 reserved */
81 u32 rsvd2[31]; /* 10c-187 reserved */
97 struct tegra_spi_platdata *plat = bus->platdata; in tegra210_qspi_ofdata_to_platdata()
98 const void *blob = gd->fdt_blob; in tegra210_qspi_ofdata_to_platdata()
101 plat->base = devfdt_get_addr(bus); in tegra210_qspi_ofdata_to_platdata()
102 plat->periph_id = clock_decode_periph_id(bus); in tegra210_qspi_ofdata_to_platdata()
104 if (plat->periph_id == PERIPH_ID_NONE) { in tegra210_qspi_ofdata_to_platdata()
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/openbmc/u-boot/arch/arm/dts/
H A Dtegra210.dtsi1 #include <dt-bindings/clock/tegra210-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra210-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
9 compatible = "nvidia,tegra210";
10 interrupt-parent = <&lic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0+
3 dtb-$(CONFIG_TARGET_SMARTWEB) += at91sam9260-smartweb.dtb
4 dtb-$(CONFIG_TARGET_TAURUS) += at91sam9g20-taurus.dtb
5 dtb-$(CONFIG_TARGET_CORVUS) += at91sam9g45-corvus.dtb
6 dtb-$(CONFIG_TARGET_GURNARD) += at91sam9g45-gurnard.dtb
8 dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb
9 dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb
10 dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
11 exynos4210-smdkv310.dtb \
12 exynos4210-universal_c210.dtb \
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra210-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra210-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra210 Pinmux Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra210-pinmux
19 - description: APB_MISC_GP_*_PADCTRL register (pad control)
20 - description: PINMUX_AUX_* registers (pinmux)
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/openbmc/linux/drivers/spi/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 ccflags-$(CONFIG_SPI_DEBUG) := -DDEBUG
8 # small core, mostly translating board-specific
10 obj-$(CONFIG_SPI_MASTER) += spi.o
11 obj-$(CONFIG_SPI_MEM) += spi-mem.o
12 obj-$(CONFIG_SPI_MUX) += spi-mux.o
13 obj-$(CONFIG_SPI_SPIDEV) += spidev.o
14 obj-$(CONFIG_SPI_LOOPBACK_TEST) += spi-loopback-test.o
17 obj-$(CONFIG_SPI_ALTERA) += spi-altera-platform.o
18 obj-$(CONFIG_SPI_ALTERA_CORE) += spi-altera-core.o
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 dynamic device discovery; some are even write-only or read-only.
17 chips, analog to digital (and d-to-a) converters, and more.
44 If your system has an master-capable SPI controller (which
56 by providing a high-level interface to send memory-like commands.
145 supports spi-mem interface.
224 this code to manage the per-word or per-transfer accesses to the
253 Cadence QSPI is a specialized controller for connecting an SPI
254 Flash over 1/2/4-bit wide bus. Enable this option if you have a
255 device with a Cadence QSPI controller and want to access the
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H A Dspi-tegra210-quad.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
235 return readl(tqspi->base + offset); in tegra_qspi_readl()
240 writel(value, tqspi->base + offset); in tegra_qspi_writel()
244 readl(tqspi->base + QSPI_COMMAND1); in tegra_qspi_writel()
271 unsigned int remain_len = t->len - tqspi->cur_pos; in tegra_qspi_calculate_curr_xfer_param()
272 unsigned int bits_per_word = t->bits_per_word; in tegra_qspi_calculate_curr_xfer_param()
274 tqspi->bytes_per_word = DIV_ROUND_UP(bits_per_word, 8); in tegra_qspi_calculate_curr_xfer_param()
277 * Tegra QSPI controller supports packed or unpacked mode transfers. in tegra_qspi_calculate_curr_xfer_param()
284 bits_per_word == 32) && t->len > 3) { in tegra_qspi_calculate_curr_xfer_param()
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/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra210.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
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H A Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
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H A Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
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H A Dtegra210-smaug.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include "tegra210.dtsi"
12 compatible = "google,smaug-rev8", "google,smaug-rev7",
13 "google,smaug-rev6", "google,smaug-rev5",
14 "google,smaug-rev4", "google,smaug-rev3",
15 "google,smaug-rev2", "google,smaug-rev1",
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/openbmc/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Pinctrl data for the NVIDIA Tegra210 pinmux
14 #include "pinctrl-tegra.h"
177 /* All non-GPIO pins follow */
181 /* Non-GPIO pins */
1231 FUNCTION(qspi),
1269 #define DRV_PINGROUP_REG(r) ((r) - DRV_PINGROUP_REG_A)
1270 #define PINGROUP_REG(r) ((r) - PINGROUP_REG_A)
1273 #define PINGROUP_BIT_N(b) (-1)
1300 .ioreset_bit = -1, \
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/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra-periph.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
16 #include "clk-id.h"
130 #define MASK(x) (BIT(x) - 1)
761 …MUX8("qspi", mux_pllp_pllc_pllc_out1_pllc4_out2_pllc4_out1_clkm_pllc4_out0, CLK_SOURCE_QSPI, 211, …
787 GATE("mipi-cal", "clk72mhz", 56, 0, tegra_clk_mipi_cal, 0),
873 dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks); in periph_clk_init()
877 bank = get_reg_bank(data->periph.gate.clk_num); in periph_clk_init()
881 data->periph.gate.regs = bank; in periph_clk_init()
899 dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks); in gate_clk_init()
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/openbmc/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
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/openbmc/
Dopengrok1.0.log1 2025-01-23 03:00:35.620-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-01-23 03:00:35.747-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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Dopengrok2.0.log1 2025-01-22 03:00:43.118-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-01-22 03:00:43.231-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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