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Searched +full:syscon +full:- +full:raminit (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/net/can/c_can/
H A Dc_can_platform.c9 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
36 #include <linux/mfd/syscon.h>
47 /* 16-bit c_can registers can be arranged differently in the memory
48 * architecture of different implementations. For example: 16-bit
49 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.
55 return readw(priv->base + priv->regs[index]); in c_can_plat_read_reg_aligned_to_16bit()
61 writew(val, priv->base + priv->regs[index]); in c_can_plat_write_reg_aligned_to_16bit()
67 return readw(priv->base + 2 * priv->regs[index]); in c_can_plat_read_reg_aligned_to_32bit()
73 writew(val, priv->base + 2 * priv->regs[index]); in c_can_plat_write_reg_aligned_to_32bit()
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H A Dc_can.h9 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
165 /* RAMINIT register description. Optional. */
171 /* Out of band RAMINIT register access via syscon regmap */
173 struct regmap *syscon; /* for raminit ctrl. reg. access */ member
174 unsigned int reg; /* register index within syscon */
211 struct c_can_raminit raminit_sys; /* RAMINIT via syscon regmap */
212 void (*raminit)(const struct c_can_priv *priv, bool enable); member
230 return ring->head & (ring->obj_num - 1); in c_can_get_tx_head()
235 return ring->tail & (ring->obj_num - 1); in c_can_get_tx_tail()
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/openbmc/linux/Documentation/devicetree/bindings/net/can/
H A Dbosch,c_can.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Dario Binacchi <dariobin@libero.it>
15 - $ref: can-controller.yaml#
20 - enum:
21 - bosch,c_can
22 - bosch,d_can
23 - ti,dra7-d_can
24 - ti,am3352-d_can
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/openbmc/u-boot/arch/arm/dts/
H A Dam33xx.dtsi4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
13 #include <dt-bindings/clock/am3.h>
17 interrupt-parent = <&intc>;
18 #address-cells = <1>;
19 #size-cells = <1>;
32 d-can0 = &dcan0;
33 d-can1 = &dcan1;
45 #address-cells = <1>;
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H A Dam4372.dtsi4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&wakeupgen>;
32 #address-cells = <1>;
33 #size-cells = <0>;
35 compatible = "arm,cortex-a9";
40 clock-names = "cpu";
42 clock-latency = <300000>; /* From omap-cpufreq driver */
46 gic: interrupt-controller@48241000 {
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H A Ddra7.dtsi2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/dra.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
20 interrupt-parent = <&crossbar_mpu>;
47 compatible = "arm,armv7-timer";
52 interrupt-parent = <&gic>;
55 gic: interrupt-controller@48211000 {
56 compatible = "arm,cortex-a15-gic";
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/openbmc/u-boot/arch/x86/cpu/broadwell/
H A Dsdram.c1 // SPDX-License-Identifier: GPL-2.0
5 * From coreboot src/soc/intel/broadwell/romstage/raminit.c
11 #include <syscon.h>
39 pei_data->pei_version = PEI_VERSION; in broadwell_fill_pei_data()
40 pei_data->board_type = BOARD_TYPE_ULT; in broadwell_fill_pei_data()
41 pei_data->pciexbar = MCFG_BASE_ADDRESS; in broadwell_fill_pei_data()
42 pei_data->smbusbar = SMBUS_BASE_ADDRESS; in broadwell_fill_pei_data()
43 pei_data->ehcibar = EARLY_EHCI_BAR; in broadwell_fill_pei_data()
44 pei_data->xhcibar = EARLY_XHCI_BAR; in broadwell_fill_pei_data()
45 pei_data->gttbar = EARLY_GTT_BAR; in broadwell_fill_pei_data()
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/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dam33xx-l4.dtsi2 compatible = "ti,am33xx-l4-wkup", "simple-pm-bus";
3 power-domains = <&prm_wkup>;
5 clock-names = "fck";
10 reg-names = "ap", "la", "ia0", "ia1";
11 #address-cells = <1>;
12 #size-cells = <1>;
18 compatible = "simple-pm-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
28 compatible = "simple-pm-bus";
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H A Dam437x-l4.dtsi2 compatible = "ti,am4-l4-wkup", "simple-pm-bus";
3 power-domains = <&prm_wkup>;
5 clock-names = "fck";
10 reg-names = "ap", "la", "ia0", "ia1";
11 #address-cells = <1>;
12 #size-cells = <1>;
18 compatible = "simple-pm-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
28 compatible = "simple-pm-bus";
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H A Ddra7-l4.dtsi2 compatible = "ti,dra7-l4-cfg", "simple-pm-bus";
3 power-domains = <&prm_coreaon>;
5 clock-names = "fck";
9 reg-names = "ap", "la", "ia0";
10 #address-cells = <1>;
11 #size-cells = <1>;
17 compatible = "simple-pm-bus";
18 #address-cells = <1>;
19 #size-cells = <1>;
50 target-module@2000 { /* 0x4a002000, ap 3 08.0 */
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