/openbmc/linux/Documentation/devicetree/bindings/rtc/ |
H A D | st,stm32-rtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Real Time Clock 10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com> 15 - st,stm32-rtc 16 - st,stm32h7-rtc 17 - st,stm32mp1-rtc 26 clock-names: [all …]
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/openbmc/linux/arch/arm/boot/dts/st/ |
H A D | stm32f746.dtsi | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "../armv7-m.dtsi" 44 #include <dt-bindings/clock/stm32fx-clock.h> 45 #include <dt-bindings/mfd/stm32f7-rcc.h> 48 #address-cells = <1>; 49 #size-cells = <1>; 52 clk_hse: clk-hse { 53 #clock-cells = <0>; 54 compatible = "fixed-clock"; [all …]
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H A D | stm32f429.dtsi | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 22 * MA 02110-1301 USA 48 #include "../armv7-m.dtsi" 49 #include <dt-bindings/clock/stm32fx-clock.h> 50 #include <dt-bindings/mfd/stm32f4-rcc.h> 53 #address-cells = <1>; 54 #size-cells = <1>; 57 clk_hse: clk-hse { 58 #clock-cells = <0>; [all …]
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H A D | stm32h743.dtsi | 2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "../armv7-m.dtsi" 44 #include <dt-bindings/clock/stm32h7-clks.h> 45 #include <dt-bindings/mfd/stm32h7-rcc.h> 46 #include <dt-bindings/interrupt-controller/irq.h> 49 #address-cells = <1>; 50 #size-cells = <1>; 53 clk_hse: clk-hse { 54 #clock-cells = <0>; [all …]
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H A D | stm32mp151.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp1-clks.h> 8 #include <dt-bindings/reset/stm32mp1-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
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H A D | stm32mp131.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp13-clks.h> 8 #include <dt-bindings/reset/stm32mp13-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
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H A D | stm32f769-disco.dts | 2 * Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com> 4 * This file is dual-licensed: you can use it either under the terms 43 /dts-v1/; 45 #include "stm32f769-pinctrl.dtsi" 46 #include <dt-bindings/input/input.h> 47 #include <dt-bindings/gpio/gpio.h> 50 model = "STMicroelectronics STM32F769-DISCO board"; 51 compatible = "st,stm32f769-disco", "st,stm32f769"; 55 stdout-path = "serial0:115200n8"; 68 compatible = "gpio-leds"; [all …]
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H A D | stm32746g-eval.dts | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 43 /dts-v1/; 45 #include "stm32f746-pinctrl.dtsi" 46 #include <dt-bindings/input/input.h> 47 #include <dt-bindings/interrupt-controller/irq.h> 50 model = "STMicroelectronics STM32746g-EVAL board"; 51 compatible = "st,stm32746g-eval", "st,stm32f746"; 55 stdout-path = "serial0:115200n8"; 68 compatible = "gpio-leds"; [all …]
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H A D | stm32f469-disco.dts | 2 * Copyright 2016 - Lee Jones <lee.jones@linaro.org> 4 * This file is dual-licensed: you can use it either under the terms 22 * MA 02110-1301 USA 48 /dts-v1/; 50 #include "stm32f469-pinctrl.dtsi" 51 #include <dt-bindings/gpio/gpio.h> 52 #include <dt-bindings/input/input.h> 55 model = "STMicroelectronics STM32F469i-DISCO board"; 56 compatible = "st,stm32f469i-disco", "st,stm32f469"; 60 stdout-path = "serial0:115200n8"; [all …]
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H A D | stm32f429-disco.dts | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 22 * MA 02110-1301 USA 48 /dts-v1/; 50 #include "stm32f429-pinctrl.dtsi" 51 #include <dt-bindings/input/input.h> 52 #include <dt-bindings/interrupt-controller/irq.h> 53 #include <dt-bindings/gpio/gpio.h> 56 model = "STMicroelectronics STM32F429i-DISCO board"; 57 compatible = "st,stm32f429i-disco", "st,stm32f429"; [all …]
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H A D | stm32429i-eval.dts | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 22 * MA 02110-1301 USA 48 /dts-v1/; 50 #include "stm32f429-pinctrl.dtsi" 51 #include <dt-bindings/input/input.h> 52 #include <dt-bindings/gpio/gpio.h> 53 #include <dt-bindings/media/video-interfaces.h> 56 model = "STMicroelectronics STM32429i-EVAL board"; 57 compatible = "st,stm32429i-eval", "st,stm32f429"; [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | stm32f429.dtsi | 2 * Copyright (C) 2015, STMicroelectronics - All Rights Reserved 3 * Author(s): Maxime Coquelin <mcoquelin.stm32@gmail.com> for STMicroelectronics. 5 * This file is dual-licensed: you can use it either under the terms 45 #include "armv7-m.dtsi" 46 #include <dt-bindings/clock/stm32fx-clock.h> 47 #include <dt-bindings/mfd/stm32f4-rcc.h> 51 clk_hse: clk-hse { 52 #clock-cells = <0>; 53 compatible = "fixed-clock"; 54 clock-frequency = <0>; [all …]
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H A D | stm32f429-disco.dts | 2 * Copyright (C) 2015, STMicroelectronics - All Rights Reserved 3 * Author(s): Maxime Coquelin <mcoquelin.stm32@gmail.com> for STMicroelectronics. 5 * This file is dual-licensed: you can use it either under the terms 44 /dts-v1/; 46 #include "stm32f429-pinctrl.dtsi" 47 #include <dt-bindings/input/input.h> 50 model = "STMicroelectronics STM32F429i-DISCO board"; 51 compatible = "st,stm32f429i-disco", "st,stm32f429"; 55 stdout-path = "serial0:115200n8"; 67 compatible = "gpio-leds"; [all …]
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H A D | stm32f469-disco.dts | 2 * Copyright 2016 - Lee Jones <lee.jones@linaro.org> 4 * This file is dual-licensed: you can use it either under the terms 43 /dts-v1/; 45 #include "stm32f469-pinctrl.dtsi" 48 model = "STMicroelectronics STM32F469i-DISCO board"; 49 compatible = "st,stm32f469i-disco", "st,stm32f469"; 53 stdout-path = "serial0:115200n8"; 65 compatible = "regulator-fixed"; 66 regulator-name = "mmc_vcard"; 67 regulator-min-microvolt = <3300000>; [all …]
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/openbmc/qemu/docs/system/arm/ |
H A D | stm32.rst | 1 STMicroelectronics STM32 boards (``netduino2``, ``netduinoplus2``, ``olimex-stm32-h405``, ``stm32vl… 4 The `STM32`_ chips are a family of 32-bit ARM-based microcontroller by 7 .. _STM32: https://www.st.com/en/microcontrollers-microprocessors/stm32-32-bit-arm-cortex-mcus.html 9 The STM32F1 series is based on ARM Cortex-M3 core. The following machines are 12 - ``stm32vldiscovery`` STM32VLDISCOVERY board with STM32F100RBT6 microcontroller 14 The STM32F2 series is based on ARM Cortex-M3 core. The following machines are 17 - ``netduino2`` Netduino 2 board with STM32F205RFT6 microcontroller 19 The STM32F4 series is based on ARM Cortex-M4F core, as well as the STM32L4 20 ultra-low-power series. The STM32F4 series is pin-to-pin compatible with STM32F2 series. 21 The following machines are based on this ARM Cortex-M4F chip : [all …]
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/openbmc/u-boot/doc/device-tree-bindings/clock/ |
H A D | st,stm32h7-rcc.txt | 6 Please refer to clock-bindings.txt for common clock controller binding usage. 10 - compatible: Should be: 11 "st,stm32h743-rcc" 13 - reg: should be register base and length as documented in the 16 - #reset-cells: 1, see below 18 - #clock-cells : from common clock binding; shall be set to 1 20 - clocks: External oscillator clock phandle 21 - high speed external clock signal (HSE) 22 - low speed external clock signal (LSE) 23 - external I2S clock (I2S_CKIN) [all …]
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H A D | st,stm32mp1.txt | 7 ------------------------------- 8 RCC CLOCK = st,stm32mp1-rcc-clk 9 ------------------------------- 15 Please refer to ../mfd/st,stm32-rcc.txt for all the other properties common 20 - compatible: Should be "st,stm32mp1-rcc-clk" 22 - st,clksrc : The clock source in this order 25 MPU AXI MCU PLL12 PLL3 PLL4 RTC MCO1 MCO2 28 dt-bindings/clock/stm32mp1-clksrc.h: CLK_<NAME>_<SOURCE> 30 - st,clkdiv : The div parameters in this order 32 MPU AXI MCU APB1 APB2 APB3 APB4 APB5 RTC MCO1 MCO2 [all …]
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/openbmc/linux/drivers/rtc/ |
H A D | rtc-stm32.c | 1 // SPDX-License-Identifier: GPL-2.0 18 #include <linux/rtc.h> 91 /* Max STM32 RTC register offset is 0x3FC */ 94 /* STM32 RTC driver time helpers */ 119 void (*clear_events)(struct stm32_rtc *rtc, unsigned int flags); 137 static void stm32_rtc_wpr_unlock(struct stm32_rtc *rtc) in stm32_rtc_wpr_unlock() argument 139 const struct stm32_rtc_registers *regs = &rtc->data->regs; in stm32_rtc_wpr_unlock() 141 writel_relaxed(RTC_WPR_1ST_KEY, rtc->base + regs->wpr); in stm32_rtc_wpr_unlock() 142 writel_relaxed(RTC_WPR_2ND_KEY, rtc->base + regs->wpr); in stm32_rtc_wpr_unlock() 145 static void stm32_rtc_wpr_lock(struct stm32_rtc *rtc) in stm32_rtc_wpr_lock() argument [all …]
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H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 # Makefile for RTC class/drivers. 6 ccflags-$(CONFIG_RTC_DEBUG) := -DDEBUG 8 obj-$(CONFIG_RTC_LIB) += lib.o 9 obj-$(CONFIG_RTC_CLASS) += rtc-core.o 10 obj-$(CONFIG_RTC_MC146818_LIB) += rtc-mc146818-lib.o 11 rtc-core-y := class.o interface.o 13 rtc-core-$(CONFIG_RTC_NVMEM) += nvmem.o 14 rtc-core-$(CONFIG_RTC_INTF_DEV) += dev.o 15 rtc-core-$(CONFIG_RTC_INTF_PROC) += proc.o [all …]
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H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # RTC class/drivers configuration 19 Generic RTC class support. If you say yes here, you will 26 bool "Set system time from RTC on startup and resume" 30 the value read from a specified RTC device. This is useful to avoid 34 string "RTC used to set the system time" 38 The RTC device that will be used to (re)initialize the system 44 This clock should be battery-backed, so that it reads the correct 45 time when the system boots from a power-off state. Otherwise, your 50 sleep states. Do not specify an RTC here unless it stays powered [all …]
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | st,stm32h7-rcc.txt | 6 Please refer to clock-bindings.txt for common clock controller binding usage. 10 - compatible: Should be: 11 "st,stm32h743-rcc" 13 - reg: should be register base and length as documented in the 16 - #reset-cells: 1, see below 18 - #clock-cells : from common clock binding; shall be set to 1 20 - clocks: External oscillator clock phandle 21 - high speed external clock signal (HSE) 22 - low speed external clock signal (LSE) 23 - external I2S clock (I2S_CKIN) [all …]
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H A D | st,stm32-rcc.txt | 1 STMicroelectronics STM32 Reset and Clock Controller 6 Please refer to clock-bindings.txt for common clock controller binding usage. 10 - compatible: Should be: 11 "st,stm32f42xx-rcc" 12 "st,stm32f469-rcc" 13 "st,stm32f746-rcc" 14 "st,stm32f769-rcc" 16 - reg: should be register base and length as documented in the 18 - #reset-cells: 1, see below 19 - #clock-cells: 2, device nodes should specify the clock in their "clocks" [all …]
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/openbmc/u-boot/arch/arm/mach-rockchip/rk3368/ |
H A D | Kconfig | 7 bool "Theobroma Systems RK3368-uQ7 (Lion) module" 9 The RK3368-uQ7 is a micro-Qseven form-factor (40mm x 70mm, 10 MXM-230 connector) system-on-module designed by Theobroma 14 - 8x Cortex-A53 (in 2 clusters of 4 cores each) 15 - (on-module) up to 4GB of DDR3 memory 16 - (on-module) SPI-NOR flash 17 - (on-module) eMMC 18 - Gigabit Ethernet (with an on-module KSZ9031 PHY) 19 - USB 20 - HDMI [all …]
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/openbmc/linux/drivers/clocksource/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 60 bool "OMAP dual-mode timer driver" if ARCH_K3 || COMPILE_TEST 64 Enables the support for the TI dual-mode timer driver. 180 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture, 203 32-bit free running decrementing counters. 238 bool "Integrator-AP timer driver" if COMPILE_TEST 241 Enables support for the Integrator-AP timer. 266 available on many OMAP-like platforms. 269 bool "Clocksource for STM32 SoCs" if !ARCH_STM32 275 bool "Low power clocksource for STM32 SoCs" [all …]
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/openbmc/linux/drivers/mfd/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 45 tristate "Active-semi ACT8945A" 50 Support for the ACT8945A PMIC from Active-semi. This device 51 features three step-down DC/DC converters and four low-dropout 67 sun4i-gpadc-iio and the hwmon driver iio_hwmon. 70 called sun4i-gpadc. 101 tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down 102 controllers, 11 LDOs, RTC, automatic battery, temperature and 132 over at91-usart-serial driver and usart-spi-driver. Only one function 148 tristate "Atmel HLCDC (High-end LCD Controller)" [all …]
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