Home
last modified time | relevance | path

Searched +full:stih407 +full:- +full:powerdown (Results 1 – 18 of 18) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/reset/
H A Dst,stih407-powerdown.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/st,stih407-powerdown.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STi family Sysconfig Peripheral Powerdown Reset Controller
10 - Srinivas Kandagatla <srinivas.kandagatla@st.com>
14 disable on-chip peripheral controllers such as USB and SATA, using
15 "powerdown" control bits found in the STi family SoC system configuration
19 The actual action taken when powerdown is asserted is hardware dependent.
26 const: st,stih407-powerdown
[all …]
/openbmc/linux/drivers/reset/sti/
H A Dreset-stih407.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <dt-bindings/reset/stih407-resets.h>
11 #include "reset-syscfg.h"
13 /* STiH407 Peripheral powerdown definitions. */
14 static const char stih407_core[] = "st,stih407-core-syscfg";
15 static const char stih407_sbc_reg[] = "st,stih407-sbc-reg-syscfg";
16 static const char stih407_lpm[] = "st,stih407-lpm-syscfg";
25 /* Powerdown requests control 0 */
28 /* Powerdown requests control 1 (High Speed Links) */
32 /* Ethernet powerdown/status/reset */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Ddwc3-st.txt3 This file documents the parameters for the dwc3-st driver.
5 STiH407 based platforms.
8 - compatible : must be "st,stih407-dwc3"
9 - reg : glue logic base address and USB syscfg ctrl register offset
10 - reg-names : should be "reg-glue" and "syscfg-reg"
11 - st,syscon : should be phandle to system configuration node which
13 - resets : list of phandle and reset specifier pairs. There should be two entries, one
14 for the powerdown and softreset lines of the usb3 IP
15 - reset-names : list of reset signal names. Names should be "powerdown" and "softreset"
16 See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml
[all …]
H A Dohci-st.txt5 - compatible : must be "st,st-ohci-300x"
6 - reg : physical base addresses of the controller and length of memory mapped
8 - interrupts : one OHCI controller interrupt should be described here
9 - clocks : phandle list of usb clocks
10 - clock-names : should be "ic" for interconnect clock and "clk48"
11 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
13 - phys : phandle for the PHY device
14 - phy-names : should be "usb"
16 - resets : phandle to the powerdown and reset controller for the USB IP
17 - reset-names : should be "power" and "softreset".
[all …]
H A Dehci-st.txt4 - compatible : must be "st,st-ehci-300x"
5 - reg : physical base addresses of the controller and length of memory mapped
7 - interrupts : one EHCI interrupt should be described here
8 - pinctrl-names : a pinctrl state named "default" must be defined
9 - pinctrl-0 : phandle referencing pin configuration of the USB controller
10 See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
11 - clocks : phandle list of usb clocks
12 - clock-names : should be "ic" for interconnect clock and "clk48"
13 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
15 - phys : phandle for the PHY device
[all …]
/openbmc/u-boot/doc/device-tree-bindings/usb/
H A Ddwc3-st.txt3 This file documents the parameters for the dwc3-st driver.
5 STiH407 based platforms.
8 - compatible : must be "st,stih407-dwc3"
9 - reg : glue logic base address and USB syscfg ctrl register offset
10 - reg-names : should be "reg-glue" and "syscfg-reg"
11 - st,syscon : should be phandle to system configuration node which
13 - resets : list of phandle and reset specifier pairs. There should be two entries, one
14 for the powerdown and softreset lines of the usb3 IP
15 - reset-names : list of reset signal names. Names should be "powerdown" and "softreset"
17 - #address-cells, #size-cells : should be '1' if the device has sub-nodes
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstih410.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "stih410-clock.dtsi"
7 #include "stih407-family.dtsi"
8 #include "stih410-pinctrl.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
16 compatible = "st,stih407-usb2-phy";
17 #phy-cells = <0>;
21 reset-names = "global", "port";
27 compatible = "st,stih407-usb2-phy";
28 #phy-cells = <0>;
[all …]
H A Dstih418.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "stih418-clock.dtsi"
7 #include "stih407-family.dtsi"
8 #include "stih410-pinctrl.dtsi"
11 #address-cells = <1>;
12 #size-cells = <0>;
15 compatible = "arm,cortex-a9";
17 /* u-boot puts hpen in SBC dmem at 0xa4 offset */
18 cpu-release-addr = <0x94100A4>;
22 compatible = "arm,cortex-a9";
[all …]
H A Dstih407-family.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "stih407-pinctrl.dtsi"
7 #include <dt-bindings/mfd/st-lpc.h>
8 #include <dt-bindings/phy/phy.h>
9 #include <dt-bindings/reset/stih407-resets.h>
10 #include <dt-bindings/interrupt-controller/irq-st.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
15 reserved-memory {
16 #address-cells = <1>;
[all …]
/openbmc/u-boot/drivers/reset/
H A Dsti-reset.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
11 #include <reset-uclass.h>
14 #include <dt-bindings/reset/stih407-resets.h>
48 * @wait_for_ack: The controller will wait for reset assert and de-assert to
62 /* STiH407 Peripheral powerdown definitions. */
63 static const char stih407_core[] = "st,stih407-core-syscfg";
64 static const char stih407_sbc_reg[] = "st,stih407-sbc-reg-syscfg";
65 static const char stih407_lpm[] = "st,stih407-lpm-syscfg";
95 /* Powerdown requests control 0 */
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dstih407-family.dtsi9 #include "stih407-pinctrl.dtsi"
10 #include <dt-bindings/mfd/st-lpc.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/reset/stih407-resets.h>
13 #include <dt-bindings/interrupt-controller/irq-st.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
18 reserved-memory {
19 #address-cells = <1>;
20 #size-cells = <1>;
[all …]
H A Dstih410.dtsi9 #include "stih410-clock.dtsi"
10 #include "stih407-family.dtsi"
11 #include "stih410-pinctrl.dtsi"
20 st,syscfg-eng = <&syscfg_opp 0x4 0x0>;
22 operating-points-v2 = <&cpu0_opp_table>;
26 operating-points-v2 = <&cpu0_opp_table>;
31 compatible = "operating-points-v2";
32 opp-shared;
35 opp-supported-hw = <0xffffffff 0xffffffff 0xffffffff>;
36 opp-hz = /bits/ 64 <1500000000>;
[all …]
/openbmc/u-boot/drivers/usb/host/
H A Ddwc3-sti-glue.c1 // SPDX-License-Identifier: GPL-2.0+
3 * STiH407 family DWC3 specific Glue layer
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
17 #include <reset-uclass.h>
23 #include <dwc3-sti-glue.h>
28 * struct sti_dwc3_glue_platdata - dwc3 STi glue driver private structure
32 * @powerdown_ctl: rest controller for powerdown signal
49 val = readl(plat->syscfg_base + plat->syscfg_offset); in sti_dwc3_glue_drd_init()
53 switch (plat->mode) { in sti_dwc3_glue_drd_init()
73 pr_err("Unsupported mode of operation %d\n", plat->mode); in sti_dwc3_glue_drd_init()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dphy-stih407-usb.txt1 ST STiH407 USB PHY controller
4 host controllers (when controlling usb2/1.1 devices) available on STiH407 SoC family from STMicroel…
7 - compatible : should be "st,stih407-usb2-phy"
8 - st,syscfg : phandle of sysconfig bank plus integer array containing phyparam and phyctrl registe…
9 - resets : list of phandle and reset specifier pairs. There should be two entries, one
11 - reset-names : list of reset signal names. Should be "global" and "port"
12 See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml
18 compatible = "st,stih407-usb2-phy";
19 #phy-cells = <0>;
23 reset-names = "global", "port";
/openbmc/u-boot/doc/device-tree-bindings/phy/
H A Dphy-stih407-usb.txt1 ST STiH407 USB PHY controller
4 host controllers (when controlling usb2/1.1 devices) available on STiH407 SoC family from STMicroel…
7 - compatible : should be "st,stih407-usb2-phy"
8 - st,syscfg : phandle of sysconfig bank plus integer array containing phyparam and phyctrl registe…
9 - resets : list of phandle and reset specifier pairs. There should be two entries, one
11 - reset-names : list of reset signal names. Should be "global" and "port"
12 See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt
18 compatible = "st,stih407-usb2-phy";
19 #phy-cells = <0>;
23 reset-names = "global", "port";
/openbmc/linux/include/dt-bindings/reset/
H A Dstih407-resets.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * based peripheral powerdown requests on the STMicroelectronics
5 * STiH407 SoC.
10 /* Powerdown requests control 0 */
14 /* Synp GMAC PowerDown */
17 /* Powerdown requests control 1 */
/openbmc/linux/Documentation/devicetree/bindings/ata/
H A Dahci-st.txt6 - compatible : Must be "st,ahci"
7 - reg : Physical base addresses and length of register sets
8 - interrupts : Interrupt associated with the SATA device
9 - interrupt-names : Associated name must be; "hostc"
10 - clocks : The phandle for the clock
11 - clock-names : Associated name must be; "ahci_clk"
12 - phys : The phandle for the PHY port
13 - phy-names : Associated name must be; "ahci_phy"
16 - resets : The power-down, soft-reset and power-reset lines of SATA IP
17 - reset-names : Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst"
[all …]
/openbmc/linux/drivers/usb/dwc3/
H A Ddwc3-st.c1 // SPDX-License-Identifier: GPL-2.0+
3 * dwc3-st.c Support for dwc3 platform devices on ST Microelectronics platforms
14 * Inspired by dwc3-omap.c and dwc3-exynos.c.
78 * struct st_dwc3 - dwc3-st driver private structure
84 * @rstc_pwrdn: rest controller for powerdown signal
120 err = regmap_read(dwc3_data->regmap, dwc3_data->syscfg_reg_off, &val); in st_dwc3_drd_init()
126 switch (dwc3_data->dr_mode) { in st_dwc3_drd_init()
161 dev_err(dwc3_data->dev, "Unsupported mode of operation %d\n", in st_dwc3_drd_init()
162 dwc3_data->dr_mode); in st_dwc3_drd_init()
163 return -EINVAL; in st_dwc3_drd_init()
[all …]