1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2efdf5aa8SPhilipp Zabel /*
3efdf5aa8SPhilipp Zabel  * This header provides constants for the reset controller
4efdf5aa8SPhilipp Zabel  * based peripheral powerdown requests on the STMicroelectronics
5efdf5aa8SPhilipp Zabel  * STiH407 SoC.
6efdf5aa8SPhilipp Zabel  */
7efdf5aa8SPhilipp Zabel #ifndef _DT_BINDINGS_RESET_CONTROLLER_STIH407
8efdf5aa8SPhilipp Zabel #define _DT_BINDINGS_RESET_CONTROLLER_STIH407
9efdf5aa8SPhilipp Zabel 
10efdf5aa8SPhilipp Zabel /* Powerdown requests control 0 */
11efdf5aa8SPhilipp Zabel #define STIH407_EMISS_POWERDOWN		0
12efdf5aa8SPhilipp Zabel #define STIH407_NAND_POWERDOWN		1
13efdf5aa8SPhilipp Zabel 
14efdf5aa8SPhilipp Zabel /* Synp GMAC PowerDown */
15efdf5aa8SPhilipp Zabel #define STIH407_ETH1_POWERDOWN		2
16efdf5aa8SPhilipp Zabel 
17efdf5aa8SPhilipp Zabel /* Powerdown requests control 1 */
18efdf5aa8SPhilipp Zabel #define STIH407_USB3_POWERDOWN		3
19efdf5aa8SPhilipp Zabel #define STIH407_USB2_PORT1_POWERDOWN	4
20efdf5aa8SPhilipp Zabel #define STIH407_USB2_PORT0_POWERDOWN	5
21efdf5aa8SPhilipp Zabel #define STIH407_PCIE1_POWERDOWN		6
22efdf5aa8SPhilipp Zabel #define STIH407_PCIE0_POWERDOWN		7
23efdf5aa8SPhilipp Zabel #define STIH407_SATA1_POWERDOWN		8
24efdf5aa8SPhilipp Zabel #define STIH407_SATA0_POWERDOWN		9
25efdf5aa8SPhilipp Zabel 
26efdf5aa8SPhilipp Zabel /* Reset defines */
27efdf5aa8SPhilipp Zabel #define STIH407_ETH1_SOFTRESET		0
28efdf5aa8SPhilipp Zabel #define STIH407_MMC1_SOFTRESET		1
29efdf5aa8SPhilipp Zabel #define STIH407_PICOPHY_SOFTRESET	2
30efdf5aa8SPhilipp Zabel #define STIH407_IRB_SOFTRESET		3
31efdf5aa8SPhilipp Zabel #define STIH407_PCIE0_SOFTRESET		4
32efdf5aa8SPhilipp Zabel #define STIH407_PCIE1_SOFTRESET		5
33efdf5aa8SPhilipp Zabel #define STIH407_SATA0_SOFTRESET		6
34efdf5aa8SPhilipp Zabel #define STIH407_SATA1_SOFTRESET		7
35efdf5aa8SPhilipp Zabel #define STIH407_MIPHY0_SOFTRESET	8
36efdf5aa8SPhilipp Zabel #define STIH407_MIPHY1_SOFTRESET	9
37efdf5aa8SPhilipp Zabel #define STIH407_MIPHY2_SOFTRESET	10
38efdf5aa8SPhilipp Zabel #define STIH407_SATA0_PWR_SOFTRESET	11
39efdf5aa8SPhilipp Zabel #define STIH407_SATA1_PWR_SOFTRESET	12
40efdf5aa8SPhilipp Zabel #define STIH407_DELTA_SOFTRESET		13
41efdf5aa8SPhilipp Zabel #define STIH407_BLITTER_SOFTRESET	14
42efdf5aa8SPhilipp Zabel #define STIH407_HDTVOUT_SOFTRESET	15
43efdf5aa8SPhilipp Zabel #define STIH407_HDQVDP_SOFTRESET	16
44efdf5aa8SPhilipp Zabel #define STIH407_VDP_AUX_SOFTRESET	17
45efdf5aa8SPhilipp Zabel #define STIH407_COMPO_SOFTRESET		18
46efdf5aa8SPhilipp Zabel #define STIH407_HDMI_TX_PHY_SOFTRESET	19
47efdf5aa8SPhilipp Zabel #define STIH407_JPEG_DEC_SOFTRESET	20
48efdf5aa8SPhilipp Zabel #define STIH407_VP8_DEC_SOFTRESET	21
49efdf5aa8SPhilipp Zabel #define STIH407_GPU_SOFTRESET		22
50efdf5aa8SPhilipp Zabel #define STIH407_HVA_SOFTRESET		23
51efdf5aa8SPhilipp Zabel #define STIH407_ERAM_HVA_SOFTRESET	24
52efdf5aa8SPhilipp Zabel #define STIH407_LPM_SOFTRESET		25
53efdf5aa8SPhilipp Zabel #define STIH407_KEYSCAN_SOFTRESET	26
54efdf5aa8SPhilipp Zabel #define STIH407_USB2_PORT0_SOFTRESET	27
55efdf5aa8SPhilipp Zabel #define STIH407_USB2_PORT1_SOFTRESET	28
56c9bfec00SLee Jones #define STIH407_ST231_AUD_SOFTRESET	29
57c9bfec00SLee Jones #define STIH407_ST231_DMU_SOFTRESET	30
58c9bfec00SLee Jones #define STIH407_ST231_GP0_SOFTRESET	31
59c9bfec00SLee Jones #define STIH407_ST231_GP1_SOFTRESET	32
60efdf5aa8SPhilipp Zabel 
61efdf5aa8SPhilipp Zabel /* Picophy reset defines */
62efdf5aa8SPhilipp Zabel #define STIH407_PICOPHY0_RESET		0
63efdf5aa8SPhilipp Zabel #define STIH407_PICOPHY1_RESET		1
64efdf5aa8SPhilipp Zabel #define STIH407_PICOPHY2_RESET		2
65efdf5aa8SPhilipp Zabel 
66efdf5aa8SPhilipp Zabel #endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH407 */
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