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/openbmc/linux/drivers/memory/samsung/
H A Dexynos-srom.c1 // SPDX-License-Identifier: GPL-2.0
6 // Exynos - SROM Controller support
17 #include "exynos-srom.h"
20 /* SROM side */
29 * struct exynos_srom_reg_dump: register dump of SROM Controller registers.
30 * @offset: srom register offset from the controller base address.
39 * struct exynos_srom: platform data for exynos srom controller driver.
41 * @reg_base: srom base address
67 static int exynos_srom_configure_bank(struct exynos_srom *srom, in exynos_srom_configure_bank() argument
71 u32 timing[6]; in exynos_srom_configure_bank() local
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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dexynos-srom.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/exynos-srom.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC SROM Controller driver
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 The SROM controller can be used to attach external peripherals. In this case
19 - const: samsung,exynos4210-srom
24 "#address-cells":
27 "#size-cells":
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/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5410-smdk5410.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/irq.h>
27 stdout-path = "serial2:115200n8";
31 compatible = "fixed-clock";
32 clock-frequency = <24000000>;
33 clock-output-names = "fin_pll";
34 #clock-cells = <0>;
37 pmic_ap_clk: pmic-ap-clk {
39 compatible = "fixed-clock";
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/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dsromc.h1 /* SPDX-License-Identifier: GPL-2.0+ */
13 #define SROMC_BYTE_ADDR_MODE(x) (1<<((x*4)+1)) /* 0-> Half-word base address*/
14 /* 1-> Byte base address*/
18 #define SROMC_BC_TACS(x) (x << 28) /* address set-up */
19 #define SROMC_BC_TCOS(x) (x << 24) /* chip selection set-up */
49 u8 bank; /* srom bank number */
51 unsigned int timing[FDT_SROM_TIMING_COUNT]; /* timing parameters */ member
/openbmc/u-boot/board/samsung/common/
H A Dboard.c1 // SPDX-License-Identifier: GPL-2.0+
27 #include <dwc3-uboot.h>
80 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); in board_init()
82 if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) { in board_init()
84 return -1; in board_init()
92 gd->ram_size -= size; in board_init()
93 gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= size; in board_init()
105 gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE); in dram_init()
119 gd->bd->bi_dram[i].start = addr; in dram_init_banksize()
120 gd->bd->bi_dram[i].size = size; in dram_init_banksize()
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/openbmc/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
H A Dmain.h48 * Usage example, e.g. a three-bit field (bits 4-6):
52 * regval = R_REG(osh, &regs->regfoo);
55 * W_REG(osh, &regs->regfoo, regval);
58 (((unsigned)1 << (width)) - 1)
67 /* max # supported core revisions (0 .. MAXCOREREV - 1) */
76 #define BRCMS_SHORTSLOT_AUTO -1 /* Driver will manage Shortslot setting */
91 #define TXFID_QUEUE_MASK 0x0007 /* Bits 0-2 */
92 #define TXFID_SEQ_MASK 0x7FE0 /* Bits 5-15 */
145 ((uint)((wlc)->band->bandunit ? BAND_2G_INDEX : BAND_5G_INDEX))
152 * gmode_user: user config gmode, operating band->gmode is different.
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H A Dmain.c3 * Copyright (c) 2013 Hauke Mehrtens <hauke@hauke-m.de>
50 /* n-mode support capability */
82 #define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
133 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
167 #define BRCMS_PLCP_AUTO -1
172 #define BRCMS_PROTECTION_AUTO -1
199 /* MSC in use,indicates b0-6 holds an mcs */
361 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK] in brcms_basic_rate()
363 return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK]; in brcms_basic_rate()
376 return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME : in get_sifs()
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/openbmc/u-boot/arch/arm/dts/
H A Dexynos5250-smdk5250.dts12 /dts-v1/;
14 #include <dt-bindings/interrupt-controller/irq.h>
45 srom-timing = <1 9 12 1 6 1 1>;
50 phy-mode = "mii";
55 samsung,codec-type = "wm8994";
65 u-boot,i2c-offset-len = <2>;
67 #sound-dai-cells = <1>;
72 compatible = "google,smdk5250-audio-wm8994";
74 samsung,model = "SMDK5250-I2S-WM8994";
75 samsung,audio-codec = <&wm8994>;
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/openbmc/linux/include/linux/bcma/
H A Dbcma_driver_pci.h1 /* SPDX-License-Identifier: GPL-2.0 */
96 #define BCMA_CORE_PCI_SPROM_CLKREQ_OFFSET_REV5 20 /* word 20 for srom rev <= 5 */
127 #define BCMA_CORE_PCI_PLP_TIMINGOVRDREG 0x234 /* Timing param override */
237 #define pcicore_read16(pc, offset) bcma_read16((pc)->core, offset)
238 #define pcicore_read32(pc, offset) bcma_read32((pc)->core, offset)
239 #define pcicore_write16(pc, offset, val) bcma_write16((pc)->core, offset, val)
240 #define pcicore_write32(pc, offset, val) bcma_write32((pc)->core, offset, val)
256 return -ENOTSUPP; in bcma_core_pci_pcibios_map_irq()
260 return -ENOTSUPP; in bcma_core_pci_plat_dev_init()
/openbmc/u-boot/
H A DREADME1 # SPDX-License-Identifier: GPL-2.0+
3 # (C) Copyright 2000 - 2013
9 This directory contains the source code for U-Boot, a boot loader for
15 The development of U-Boot is closely related to Linux: some parts of
37 scattered throughout the U-Boot source identifying the people or
41 actual U-Boot source tree; however, it can be created dynamically
51 U-Boot, you should send a message to the U-Boot mailing list at
52 <u-boot@lists.denx.de>. There is also an archive of previous traffic
53 on the mailing list - please search the archive before asking FAQ's.
54 Please see http://lists.denx.de/pipermail/u-boot and
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/openbmc/linux/drivers/staging/vt6655/
H A Dbaseband.c1 // SPDX-License-Identifier: GPL-2.0+
13 * bb_get_frame_time - Calculate data frame transmitting time
14 * bb_read_embedded - Embedded read baseband register via MAC
15 * bb_write_embedded - Embedded write baseband register via MAC
16 * bb_vt3253_init - VIA VT3253 baseband chip init code
19 * 06-10-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.
20 * 08-07-2003 Bryan YC Fan: Add MAXIM2827/2825 and RFMD2959 support.
21 * 08-26-2003 Kyle Hsu : Modify BBuGetFrameTime() and
26 * 09-01-2003 Bryan YC Fan: RF & BB tables updated.
34 #include "srom.h"
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/openbmc/linux/
H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
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H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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