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/openbmc/linux/drivers/scsi/isci/
H A Dprobe_roms.h228 * Spread Spectrum Clocking (SSC) settings for SATA and SAS.
234 * NOTE: Max spread for SATA is +0 / -5000 PPM.
237 * SATA SSC Tx at +0 / -1419 PPM Spread = 0x2
238 * SATA SSC Tx at +0 / -2129 PPM Spread = 0x3
239 * SATA SSC Tx at +0 / -4257 PPM Spread = 0x6
240 * SATA SSC Tx at +0 / -4967 PPM Spread = 0x7
246 * NOTE: Max spread for SAS down-spreading +0 /
249 * SAS SSC Tx at +0 / -1419 PPM Spread = 0x2
250 * SAS SSC Tx at +0 / -2129 PPM Spread = 0x3
252 * NOTE: Max spread for SAS center-spreading +2300 /
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dti,cdce925.yaml57 optional child node can be used to specify spread
63 spread-spectrum:
67 spread-spectrum-center:
99 spread-spectrum = <4>;
100 spread-spectrum-center;
H A Dmediatek,mt8186-fhctl.yaml7 title: MediaTek frequency hopping and spread spectrum clocking control
15 Spread spectrum clocking (SSC) is another function provided by this hardware.
35 description: The percentage of spread spectrum clocking for one PLL.
H A Drenesas,9series.yaml49 renesas,out-spread-spectrum:
52 description: Output clock down spread in pcm (1/1000 of percent)
/openbmc/linux/Documentation/devicetree/bindings/clock/ti/
H A Ddpll.txt45 "ssc-deltam" - DPLL supports spread spectrum clocking (SSC), contains
47 "ssc-modfreq" - DPLL supports spread spectrum clocking (SSC), contains
61 - ti,ssc-deltam : DPLL supports spread spectrum clocking, frequency
63 - ti,ssc-modfreq-hz : DPLL supports spread spectrum clocking, spread
65 - ti,ssc-downspread : DPLL supports spread spectrum clocking, boolean
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-platform-dptf134 (RO) Presents SSC (spread spectrum clock) information for EMI
140 [7:0] Sets clock spectrum spread percentage:
142 1 LSB = 0.1% increase in spread (for
144 1 LSB = 0.2% increase in spread (for
146 [8] When set to 1, enables spread
153 (Spread spectrum clock) range
155 to spread waveform
/openbmc/linux/Documentation/driver-api/thermal/
H A Dintel_dptf.rst204 which is compensated by adjusting Spread spectrum percent. This helps
231 Set the FIVR spread spectrum clocking percentage
234 Enable/disable of the FIVR spread spectrum clocking feature
299 Sets DLVR spread spectrum percent value.
302 Specifies how frequencies are spread using spread spectrum.
303 0: Down spread,
304 1: Spread in the Center.
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dnvidia,tegra-regulators-coupling.txt40 regulator-coupled-max-spread = <170000 550000>;
50 regulator-coupled-max-spread = <170000 550000>;
60 regulator-coupled-max-spread = <550000 550000>;
/openbmc/linux/Documentation/misc-devices/
H A Dics932s401.rst25 frequency. If spread spectrum mode is enabled, the driver also reports by what
26 percent the clock signal is being spread, which should be between 0 and -0.5%.
/openbmc/linux/drivers/clk/
H A Dclk-renesas-pcie.c236 /* Output clock spread spectrum */ in rs9_get_common_config()
237 ret = of_property_read_u32(np, "renesas,out-spread-spectrum", &ssc); in rs9_get_common_config()
239 if (ssc == 100000) /* 100% ... no spread (default) */ in rs9_get_common_config()
241 else if (ssc == 99750) /* -0.25% ... down spread */ in rs9_get_common_config()
243 else if (ssc == 99500) /* -0.50% ... down spread */ in rs9_get_common_config()
247 "Invalid renesas,out-spread-spectrum value\n"); in rs9_get_common_config()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dclock_source.h65 * Display Port HW De spread of Reference Clock related Parameters structure
70 /* Flag for HW De Spread enabled (if enabled SS on DP Reference Clock)*/
96 /*> de-spread info, relevant only for on-the-fly tune-up pixel rate*/
/openbmc/linux/Documentation/devicetree/bindings/ata/
H A Dimx-sata.yaml57 fsl,no-spread-spectrum:
59 description: if present, disable spread-spectrum clocking on the SATA link.
/openbmc/linux/lib/zstd/common/
H A Dfse_decompress.c76 BYTE* spread = (BYTE*)(symbolNext + maxSymbolValue + 1); in FSE_buildDTable_internal() local
104 /* Spread symbols */ in FSE_buildDTable_internal()
122 MEM_write64(spread + pos, sv); in FSE_buildDTable_internal()
124 MEM_write64(spread + pos + i, sv); in FSE_buildDTable_internal()
129 /* Now we spread those positions across the table. in FSE_buildDTable_internal()
144 tableDecode[uPosition].symbol = spread[s + u]; in FSE_buildDTable_internal()
/openbmc/webui-vue/src/store/modules/Logs/
H A DEventLogStore.js111 api.spread((...responses) => {
149 api.spread((...responses) => {
184 api.spread((...responses) => {
/openbmc/webui-vue/src/store/
H A Dapi.js72 spread(callback) {
73 return Axios.spread(callback);
/openbmc/u-boot/arch/arm/mach-omap2/am33xx/
H A Dclock_am33xx.c239 * Enable Spread Spectrum for the MPU by calculating the required
256 printf("Enabling Spread Spectrum of %d permille for MPU\n", in set_mpu_spreadspectrum()
287 * As we use Downspread only, the spread is twice the value of in set_mpu_spreadspectrum()
297 /* Setup Spread Spectrum */ in set_mpu_spreadspectrum()
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu11_driver_if_sienna_cichlid.h906 // SECTION: Clock Spread Spectrum
908 // GFXCLK PLL Spread Spectrum
913 // GFXCLK DFLL Spread Spectrum
918 // UCLK Spread Spectrum
922 // FCLK Spread Spectrum
949 // UCLK Spread Spectrum
1267 // SECTION: Clock Spread Spectrum
1269 // GFXCLK PLL Spread Spectrum
1274 // GFXCLK DFLL Spread Spectrum
1279 // UCLK Spread Spectrum
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/include/
H A Dbios_parser_types.h213 /* Input: Enable spread spectrum */
285 /* 1 = Center Spread; 0 = down spread */
H A Dddc_service_types.h102 /* support for Spread Spectrum(SS) */
104 /* DP link settings (laneCount, linkRate, Spread) */
/openbmc/linux/Documentation/admin-guide/cgroup-v1/
H A Dcpusets.rst25 1.6 What is memory spread ?
181 - cpuset.memory_spread_page flag: if set, spread page cache evenly on allowed nodes
182 - cpuset.memory_spread_slab flag: if set, spread slab cache evenly on allowed nodes
319 1.6 What is memory spread ?
327 the kernel will spread the file system buffers (page cache) evenly
332 then the kernel will spread some file system related slab caches,
345 When new cpusets are created, they inherit the memory spread settings
349 or slab caches to ignore the task's NUMA mempolicy and be spread
352 their containing task's memory spread settings. If memory spreading
383 to access large file system data sets that need to be spread across
/openbmc/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Ddfp.c214 * It toggles spread spectrum PLL output and sets the bindings of PLLs in nv04_dfp_prepare_sel_clk()
223 * bit 0 NVClk spread spectrum on/off in nv04_dfp_prepare_sel_clk()
224 * bit 2 MemClk spread spectrum on/off in nv04_dfp_prepare_sel_clk()
225 * bit 4 PixClk1 spread spectrum on/off toggle in nv04_dfp_prepare_sel_clk()
226 * bit 6 PixClk2 spread spectrum on/off toggle in nv04_dfp_prepare_sel_clk()
231 * maybe a different spread mode in nv04_dfp_prepare_sel_clk()
233 * The logic behind turning spread spectrum on/off in the first place, in nv04_dfp_prepare_sel_clk()
/openbmc/linux/lib/
H A Dgroup_cpus.c267 * number of groups we just spread the groups across the nodes. in __group_cpus_evenly()
307 /* Spread allocated groups on CPUs of the current node */ in __group_cpus_evenly()
373 * spread can observe consistent 'cpu_present_mask' without holding in group_cpus_evenly()
380 * from API user viewpoint since 2-stage spread is sort of in group_cpus_evenly()
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-nexus7-grouper-ti-pmic.dtsi57 regulator-coupled-max-spread = <300000>;
134 regulator-coupled-max-spread = <300000>;
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/
H A Ddce120_clk_mgr.c48 * dce121_clock_patch_xgmi_ss_info() - Save XGMI spread spectrum info
51 * Reads from VBIOS the XGMI spread spectrum info and saves it within
/openbmc/webui-vue/src/store/modules/SecurityAndAccess/
H A DUserManagementStore.js207 api.spread((...responses) => {
250 api.spread((...responses) => {
293 api.spread((...responses) => {

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