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/openbmc/linux/Documentation/devicetree/bindings/reset/
H A Dst,sti-softreset.txt1 STMicroelectronics STi family Sysconfig Peripheral SoftReset Controller
6 "softreset" control bits found in the STi family SoC system configuration
9 The actual action taken when softreset is asserted is hardware dependent.
18 - compatible: Should be "st,stih407-softreset";
23 softreset: softreset-controller {
25 compatible = "st,stih407-softreset";
29 Specifying softreset control of devices
33 property, containing a phandle to the softreset device node and an
39 resets = <&softreset STIH415_ETH0_SOFTRESET>;
H A Dst,stih407-picophyreset.yaml7 title: STMicroelectronics STi family Sysconfig Picophy SoftReset Controller
14 disable on-chip PicoPHY USB2 phy(s) using "softreset" control bits found in
17 The actual action taken when softreset is asserted is hardware dependent.
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstih410.dtsi19 resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
30 resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
45 <&softreset STIH407_USB2_PORT0_SOFTRESET>;
46 reset-names = "power", "softreset";
62 <&softreset STIH407_USB2_PORT0_SOFTRESET>;
63 reset-names = "power", "softreset";
77 <&softreset STIH407_USB2_PORT1_SOFTRESET>;
78 reset-names = "power", "softreset";
94 <&softreset STIH407_USB2_PORT1_SOFTRESET>;
95 reset-names = "power", "softreset";
[all …]
H A Dstih418.dtsi33 resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
42 resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
58 <&softreset STIH407_USB2_PORT0_SOFTRESET>;
59 reset-names = "power", "softreset";
72 <&softreset STIH407_USB2_PORT0_SOFTRESET>;
73 reset-names = "power", "softreset";
84 <&softreset STIH407_USB2_PORT1_SOFTRESET>;
85 reset-names = "power", "softreset";
98 <&softreset STIH407_USB2_PORT1_SOFTRESET>;
99 reset-names = "power", "softreset";
H A Dstih407-family.dtsi129 softreset: softreset-controller { label
130 compatible = "st,stih407-softreset";
152 resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
176 resets = <&softreset STIH407_MIPHY0_SOFTRESET>;
192 resets = <&softreset STIH407_MIPHY1_SOFTRESET>;
206 resets = <&softreset STIH407_MIPHY2_SOFTRESET>;
213 resets = <&softreset STIH407_ST231_GP0_SOFTRESET>;
226 resets = <&softreset STIH407_ST231_DMU_SOFTRESET>;
625 resets = <&softreset STIH407_MMC1_SOFTRESET>;
674 <&softreset STIH407_SATA0_SOFTRESET>,
[all …]
H A Dstih407.dtsi75 resets = <&softreset STIH407_COMPO_SOFTRESET>,
76 <&softreset STIH407_COMPO_SOFTRESET>;
85 resets = <&softreset STIH407_HDTVOUT_SOFTRESET>;
126 resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
/openbmc/u-boot/arch/arm/dts/
H A Dstih410.dtsi67 resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
78 resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
92 <&softreset STIH407_USB2_PORT0_SOFTRESET>;
93 reset-names = "power", "softreset";
110 <&softreset STIH407_USB2_PORT0_SOFTRESET>;
111 reset-names = "power", "softreset";
125 <&softreset STIH407_USB2_PORT1_SOFTRESET>;
126 reset-names = "power", "softreset";
143 <&softreset STIH407_USB2_PORT1_SOFTRESET>;
144 reset-names = "power", "softreset";
[all …]
H A Dstih407-family.dtsi132 softreset: softreset-controller { label
133 compatible = "st,stih407-softreset";
381 resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
405 resets = <&softreset STIH407_MIPHY0_SOFTRESET>;
421 resets = <&softreset STIH407_MIPHY1_SOFTRESET>;
435 resets = <&softreset STIH407_MIPHY2_SOFTRESET>;
565 resets = <&softreset STIH407_MMC1_SOFTRESET>;
566 reset-names = "softreset";
600 <&softreset STIH407_SATA0_SOFTRESET>,
601 <&softreset STIH407_SATA0_PWR_SOFTRESET>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dehci-st.txt17 - resets : phandle + reset specifier pairs to the powerdown and softreset lines
19 - reset-names : should be "power" and "softreset"
36 <&softreset STIH416_USB1_SOFTRESET>;
37 reset-names = "power", "softreset";
H A Ddwc3-st.txt14 for the powerdown and softreset lines of the usb3 IP
15 - reset-names : list of reset signal names. Names should be "powerdown" and "softreset"
50 <&softreset STIH407_MIPHY2_SOFTRESET>;
51 reset-names = "powerdown", "softreset";
H A Dohci-st.txt17 - reset-names : should be "power" and "softreset".
34 <&softreset STIH416_USB0_SOFTRESET>;
35 reset-names = "power", "softreset";
/openbmc/u-boot/doc/device-tree-bindings/usb/
H A Ddwc3-st.txt14 for the powerdown and softreset lines of the usb3 IP
15 - reset-names : list of reset signal names. Names should be "powerdown" and "softreset"
44 <&softreset STIH407_MIPHY2_SOFTRESET>;
45 reset-names = "powerdown", "softreset";
/openbmc/linux/arch/arm/mach-omap2/
H A Di2c.c30 * - Write to SOFTRESET bit.
52 /* Write to the SOFTRESET bit */ in omap_i2c_reset()
67 pr_warn("%s: %s: softreset failed (waited %d usec)\n", in omap_i2c_reset()
70 pr_debug("%s: %s: softreset in %d usec\n", __func__, in omap_i2c_reset()
H A Dwd_timer.c65 * because the watchdog is re-armed upon OCP softreset. (On OMAP4,
79 /* Write to the SOFTRESET bit */ in omap2_wd_timer_reset()
92 pr_warn("%s: %s: softreset failed (waited %d usec)\n", in omap2_wd_timer_reset()
95 pr_debug("%s: %s: softreset in %d usec\n", __func__, in omap2_wd_timer_reset()
H A Dhdq1w.c42 /* Write to the SOFTRESET bit */ in omap_hdq1w_reset()
57 pr_warn("%s: %s: softreset failed (waited %d usec)\n", in omap_hdq1w_reset()
60 pr_debug("%s: %s: softreset in %d usec\n", __func__, in omap_hdq1w_reset()
H A Dmsdi.c50 /* Write to the SOFTRESET bit */ in omap_msdi_reset()
64 pr_warn("%s: %s: softreset failed (waited %d usec)\n", in omap_msdi_reset()
67 pr_debug("%s: %s: softreset in %d usec\n", __func__, in omap_msdi_reset()
/openbmc/u-boot/drivers/usb/host/
H A Ddwc3-sti-glue.c33 * @softreset_ctl: reset controller for softreset signal
145 /* get softreset reset */ in sti_dwc3_glue_ofdata_to_platdata()
146 ret = reset_get_by_name(dev, "softreset", &plat->softreset_ctl); in sti_dwc3_glue_ofdata_to_platdata()
186 /* deassert both powerdown and softreset */ in sti_dwc3_glue_probe()
227 /* assert both powerdown and softreset */ in sti_dwc3_glue_remove()
/openbmc/linux/Documentation/devicetree/bindings/ata/
H A Dahci-st.txt30 <&softreset STIH407_SATA0_SOFTRESET>,
31 <&softreset STIH407_SATA0_PWR_SOFTRESET>;
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dphy-miphy28lp.txt67 resets = <&softreset STIH407_MIPHY0_SOFTRESET>;
83 resets = <&softreset STIH407_MIPHY1_SOFTRESET>;
96 resets = <&softreset STIH407_MIPHY2_SOFTRESET>;
/openbmc/u-boot/arch/arm/include/asm/arch-omap3/
H A Demac_defs.h33 /* SOFTRESET macro definition interferes with emac_regs structure definition */
34 #undef SOFTRESET
/openbmc/linux/drivers/misc/genwqe/
H A Dcard_sysfs.c170 switch ((cd->softreset & 0xc) >> 2) { in next_bitstream_show()
196 cd->softreset = 0x78; in next_bitstream_store()
199 cd->softreset = 0x7c; in next_bitstream_store()
205 __genwqe_writeq(cd, IO_SLC_CFGREG_SOFTRESET, cd->softreset); in next_bitstream_store()
/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dclock.h97 * @reg_offset: the first offset in cru for softreset registers
98 * @reg_number: the reg numbers of softreset registers
/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dst,stih4xx.txt187 resets = <&softreset STIH416_COMPO_M_SOFTRESET>, <&softreset STIH416_COMPO_A_SOFTRESET>;
196 resets = <&softreset STIH416_HDTVOUT_SOFTRESET>;
236 resets = <&softreset STIH407_HDQVDP_SOFTRESET>;
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dsdhci-st.txt45 - resets: Phandle and reset specifier pair to softreset line of HC IP.
87 resets = <&softreset STIH407_MMC1_SOFTRESET>;
/openbmc/linux/drivers/reset/sti/
H A Dreset-stih407.c55 #define LPM_SYSCFG_1 0x4 /* Softreset IRB & SBC UART */
136 .compatible = "st,stih407-softreset",

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