| /openbmc/linux/include/linux/regulator/ |
| H A D | da9121.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * DA9121 Single-channel dual-phase 10A buck converter
4 * DA9130 Single-channel dual-phase 10A buck converter (Automotive)
5 * DA9217 Single-channel dual-phase 6A buck converter
6 * DA9122 Dual-channel single-phase 5A buck converter
7 * DA9131 Dual-channel single-phase 5A buck converter (Automotive)
8 * DA9220 Dual-channel single-phase 3A buck converter
9 * DA9132 Dual-channel single-phase 3A buck converter (Automotive)
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| /openbmc/linux/Documentation/devicetree/bindings/regulator/ |
| H A D | dlg,da9121.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Adam Ward <Adam.Ward.opensource@diasemi.com>
13 Dialog Semiconductor DA9121 Single-channel 10A double-phase buck converter
14 Dialog Semiconductor DA9122 Double-channel 5A single-phase buck converter
15 Dialog Semiconductor DA9220 Double-channel 3A single-phase buck converter
16 Dialog Semiconductor DA9217 Single-channel 6A double-phase buck converter
17 Dialog Semiconductor DA9130 Single-channel 10A double-phase buck converter
18 Dialog Semiconductor DA9131 Double-channel 5A single-phase buck converter
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| H A D | nxp,pf8x00-regulator.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/regulator/nxp,pf8x00-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jagan Teki <jagan@amarulasolutions.com>
11 - Troy Kisky <troy.kisky@boundarydevices.com>
16 linear and one vsnvs regulators. It has built-in one time programmable
22 - nxp,pf8100
23 - nxp,pf8121a
24 - nxp,pf8200
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| /openbmc/linux/Documentation/devicetree/bindings/ |
| H A D | trivial-devices.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
27 spi-max-frequency: true
31 - enum:
33 - acbel,fsg032
34 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
35 - ad,ad7414
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| /openbmc/linux/drivers/regulator/ |
| H A D | da9121-regulator.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * DA9121 Single-channel dual-phase 10A buck converter
4 * DA9130 Single-channel dual-phase 10A buck converter (Automotive)
5 * DA9217 Single-channel dual-phase 6A buck converter
6 * DA9122 Dual-channel single-phase 5A buck converter
7 * DA9131 Dual-channel single-phase 5A buck converter (Automotive)
8 * DA9220 Dual-channel single-phase 3A buck converter
9 * DA9132 Dual-channel single-phase 3A buck converter (Automotive)
23 #include <dt-bindings/regulator/dlg,da9121-regulator.h>
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| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
38 managed regulators and simple non-configurable regulators.
65 They provide two I2C-controlled DC/DC step-down converters with
85 tristate "Active-semi act8865 voltage regulator"
90 This driver controls a active-semi act8865 voltage output
94 tristate "Active-semi ACT8945A voltage regulator"
97 This driver controls a active-semi ACT8945A voltage regulator
98 via I2C bus. The ACT8945A features three step-down DC/DC converters
99 and four low-dropout linear regulators, along with a ActivePath
110 tristate "Freescale i.MX on-chip ANATOP LDO regulators"
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| /openbmc/bmcweb/redfish-core/schema/dmtf/csdl/ |
| H A D | Circuit_v1.xml | 1 <?xml version="1.0" encoding="UTF-8"?>
2 <!---->
3 <!--################################################################################ -->
4 <!--# Redfish Schema: Circuit v1.8.1 -->
5 <!--# -->
6 <!--# For a detailed change log, see the README file contained in the DSP8010 bundle, -->
7 <!--# available at http://www.dmtf.org/standards/redfish -->
8 <!--# Copyright 2014-2024 DMTF. -->
9 <!--# For the full DMTF copyright policy, see http://www.dmtf.org/about/policies/copyright -->
10 <!--################################################################################ -->
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| /openbmc/u-boot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_write_leveling.c | 1 // SPDX-License-Identifier: GPL-2.0
58 * Desc: Execute Write leveling phase by HW
59 * Args: freq - current sequence frequency
60 * dram_info - main struct
66 u32 reg, phase, delay, cs, pup; in ddr3_write_leveling_hw() local
70 /* Debug message - Start Read leveling procedure */ in ddr3_write_leveling_hw()
71 DEBUG_WL_S("DDR3 - Write Leveling - Starting HW WL procedure\n"); in ddr3_write_leveling_hw()
86 reg |= (dram_info->cs_ena << (REG_DRAM_TRAINING_CS_OFFS)); in ddr3_write_leveling_hw()
87 reg_write(REG_DRAM_TRAINING_ADDR, reg); /* 0x15B0 - Training Register */ in ddr3_write_leveling_hw()
103 * Read results to arrays - Results are required for WL in ddr3_write_leveling_hw()
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| H A D | ddr3_read_leveling.c | 1 // SPDX-License-Identifier: GPL-2.0
55 * Desc: Execute the Read leveling phase by HW
56 * Args: dram_info - main struct
57 * freq - current sequence frequency
65 /* Debug message - Start Read leveling procedure */ in ddr3_read_leveling_hw()
66 DEBUG_RL_S("DDR3 - Read Leveling - Starting HW RL procedure\n"); in ddr3_read_leveling_hw()
74 reg |= (dram_info->cs_ena << REG_DRAM_TRAINING_CS_OFFS); in ddr3_read_leveling_hw()
76 reg_write(REG_DRAM_TRAINING_ADDR, reg); /* 0x15B0 - Training Register */ in ddr3_read_leveling_hw()
91 u32 delay, phase, pup, cs; in ddr3_read_leveling_hw() local
93 dram_info->rl_max_phase = 0; in ddr3_read_leveling_hw()
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| /openbmc/qemu/docs/devel/ |
| H A D | rcu.rst | 1 Using RCU (Read-Copy-Update) for synchronization
4 Read-copy update (RCU) is a synchronization mechanism that is used to
5 protect read-mostly data structures. RCU is very efficient and scalable
6 on the read side (it is wait-free), and thus can make the read paths
9 RCU supports concurrency between a single writer and multiple readers,
10 thus it is not used alone. Typically, the write-side will use a lock to
12 restricting updates to a single task). In QEMU, when a lock is used,
14 lock" (BQL). Also, restricting updates to a single task is done in
17 RCU is fundamentally a "wait-to-finish" mechanism. The read side marks
26 for example, reader-writer locks. It is so much more scalable that
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| /openbmc/phosphor-power/phosphor-regulators/docs/ |
| H A D | design.md | 3 This document describes the high-level design of the `phosphor-regulators`
6 The low-level design is documented using doxygen comments in the source files.
13 The `phosphor-regulators` application is a single-threaded C++ executable. It is
17 The application is driven by a system-specific JSON configuration file. The JSON
24 - Manager
25 - Top level class created in `main()`.
26 - Loads the JSON configuration file.
27 - Implements the D-Bus `configure` and `monitor` methods.
28 - Contains a System object.
29 - System
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| /openbmc/linux/Documentation/devicetree/bindings/mmc/ |
| H A D | samsung,exynos-dw-mshc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/samsung,exynos-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Jaehoon Chung <jh80.chung@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
18 - samsung,exynos4210-dw-mshc
19 - samsung,exynos4412-dw-mshc
20 - samsung,exynos5250-dw-mshc
21 - samsung,exynos5420-dw-mshc
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| /openbmc/linux/lib/zstd/compress/ |
| H A D | zstd_cwksp.h | 5 * This source code is licensed under both the BSD-style license (found in the
8 * You may select, at your option, one of the above-listed licenses.
14 /*-*************************************
20 /*-*************************************
39 /*-*************************************
51 * expect a well-formed caller to free this.
59 * Zstd fits all its internal datastructures into a single continuous buffer,
60 * so that it only needs to perform a single OS allocation (or so that a buffer
67 * - These different internal datastructures have different setup requirements:
69 * - The static objects need to be cleared once and can then be trivially
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| /openbmc/u-boot/doc/ |
| H A D | README.android-fastboot-protocol | 2 ----------------------
11 ------------------
14 * Max packet size must be 64 bytes for full-speed and 512 bytes for
15 high-speed USB
16 * The protocol is entirely host-driven and synchronous (unlike the
17 multi-channel, bi-directional, asynchronous ADB protocol)
21 ---------------------
23 1. Host sends a command, which is an ascii string in a single
26 2. Client response with a single packet no greater than 64 bytes.
31 a. INFO -> the remaining 60 bytes are an informative message
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| /openbmc/linux/Documentation/networking/device_drivers/appletalk/ |
| H A D | cops.rst | 1 .. SPDX-License-Identifier: GPL-2.0
17 LT-200 cards work in a somewhat more limited capacity than the
21 - Tangent ATB-II, Novell NL-1000, Daystar Digital LT-200
24 - Dayna DL2000/DaynaTalk PC (Half Length), COPS LT-95,
25 - Farallon PhoneNET PC III, Farallon PhoneNET PC II
28 - Dayna DL2000 (Full length)
44 insmod -o cops2 cops io=0x260 irq=3
52 lt0 Link encap:UNSPEC HWaddr 00-00-00-00-00-00-00-F7-00-00-00-00-00-00-00-00
64 * For single LTalk card use::
66 dummy -seed -phase 2 -net 2000 -addr 2000.10 -zone "1033"
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| /openbmc/qemu/docs/devel/migration/ |
| H A D | vfio.rst | 10 Migration of VFIO devices consists of two phases: the optional pre-copy phase,
11 and the stop-and-copy phase. The pre-copy phase is iterative and allows to
13 transferred. The iterative pre-copy phase of migration allows for the guest to
15 helps to reduce the total downtime of the VM. VFIO devices opt-in to pre-copy
19 When pre-copy is supported, it's possible to further reduce downtime by
20 enabling "switchover-ack" migration capability.
21 VFIO migration uAPI defines "initial bytes" as part of its pre-copy data stream
35 safe P2P-wise, since starting and stopping the devices is not done atomically
39 support P2P migration. Single VFIO device migration is allowed regardless of
44 linux-headers/linux/vfio.h.
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| /openbmc/linux/drivers/base/power/ |
| H A D | common.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/base/power/common.c - Common device power management code.
18 * dev_pm_get_subsys_data - Create or refcount power.subsys_data for device.
31 return -ENOMEM; in dev_pm_get_subsys_data()
33 spin_lock_irq(&dev->power.lock); in dev_pm_get_subsys_data()
35 if (dev->power.subsys_data) { in dev_pm_get_subsys_data()
36 dev->power.subsys_data->refcount++; in dev_pm_get_subsys_data()
38 spin_lock_init(&psd->lock); in dev_pm_get_subsys_data()
39 psd->refcount = 1; in dev_pm_get_subsys_data()
40 dev->power.subsys_data = psd; in dev_pm_get_subsys_data()
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| /openbmc/linux/drivers/hwmon/pmbus/ |
| H A D | pli1209bc.c | 1 // SPDX-License-Identifier: GPL-2.0+
26 int phase, int reg) in pli1209bc_read_word_data() argument
33 data = pmbus_read_word_data(client, page, phase, reg); in pli1209bc_read_word_data()
37 return clamp_val(data, -32768, 32767) & 0xffff; in pli1209bc_read_word_data()
45 data = pmbus_read_word_data(client, page, phase, in pli1209bc_read_word_data()
51 return pmbus_read_word_data(client, page, phase, reg); in pli1209bc_read_word_data()
53 return -ENODATA; in pli1209bc_read_word_data()
75 ret = -ENODATA; in pli1209bc_write_byte()
121 * The pli1209 digital supervisor only contains a single BCM, making
139 client->dev.platform_data = &pli1209bc_plat_data; in pli1209bc_probe()
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| H A D | ucd9200.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
82 if (!i2c_check_functionality(client->adapter, in ucd9200_probe()
85 return -ENODEV; in ucd9200_probe()
90 dev_err(&client->dev, "Failed to read device ID\n"); in ucd9200_probe()
94 dev_info(&client->dev, "Device ID %s\n", block_buffer); in ucd9200_probe()
96 for (mid = ucd9200_id; mid->name[0]; mid++) { in ucd9200_probe()
97 if (!strncasecmp(mid->name, block_buffer, strlen(mid->name))) in ucd9200_probe()
100 if (!mid->name[0]) { in ucd9200_probe()
101 dev_err(&client->dev, "Unsupported device\n"); in ucd9200_probe()
102 return -ENODEV; in ucd9200_probe()
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| /openbmc/linux/drivers/net/dsa/sja1105/ |
| H A D | sja1105.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
25 * to get a "phase" and get 1 decimal point precision.
29 #define SJA1105_RGMII_DELAY_PHASE_TO_PS(phase) \ argument
30 ((800 * (phase)) / 360)
31 #define SJA1105_RGMII_DELAY_PHASE_TO_HW(phase) \ argument
32 (((phase) - 738) / 9)
124 * 64-bit values back.
271 /* PTP two-step TX timestamp ID, and its serialization lock */
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| /openbmc/linux/sound/firewire/bebob/ |
| H A D | bebob_yamaha_terratec.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * bebob_yamaha.c - a part of driver for BeBoB based devices
5 * Copyright (c) 2013-2014 Takashi Sakamoto
12 * Yamaha GO44 is not designed to be used as stand-alone mixer. So any streams
16 * way to recover this state. GO46 is better for stand-alone mixer.
19 * At 192.0kHz, the device reports 4 PCM-in, 1 MIDI-in, 6 PCM-out, 1 MIDI-out.
20 * But Yamaha's driver reduce 2 PCM-in, 1 MIDI-in, 2 PCM-out, 1 MIDI-out to use
21 * 'Extended Stream Format Information Command - Single Request' in 'Additional
25 * Unfortunately current 'ffado-mixer' generated many asynchronous transaction
27 * recommend users to close ffado-mixer at 192.0kHz if mixer is needless.
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| /openbmc/linux/drivers/gpu/drm/i915/selftests/ |
| H A D | i915_syncmap.c | 41 for (d = 0; d < depth - 1; d++) { in __sync_print()
42 if (last & BIT(depth - d - 1)) in __sync_print()
47 *sz -= len; in __sync_print()
49 len = scnprintf(buf, *sz, "%x-> ", idx); in __sync_print()
51 *sz -= len; in __sync_print()
55 len = scnprintf(buf, *sz, "0x%016llx", p->prefix << p->height << SHIFT); in __sync_print()
57 *sz -= len; in __sync_print()
58 X = (p->height + SHIFT) / 4; in __sync_print()
59 scnprintf(buf - X, *sz + X, "%*s", X, "XXXXXXXXXXXXXXXXX"); in __sync_print()
61 if (!p->height) { in __sync_print()
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| /openbmc/linux/Documentation/bpf/libbpf/ |
| H A D | libbpf_overview.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 libbpf is a C-based library containing a BPF loader that takes compiled BPF
13 The following are the high-level features supported by libbpf:
15 * Provides high-level and low-level APIs for user space programs to interact
16 with BPF programs. The low-level APIs wrap all the bpf system call
17 functionality, which is useful when users need more fine-grained control
22 * Provides BPF-side APIS, including BPF helper definitions, BPF maps support,
24 * Supports BPF CO-RE mechanism, enabling BPF developers to write portable
42 The following section provides a brief overview of each phase in the BPF life
45 * **Open phase**: In this phase, libbpf parses the BPF
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| /openbmc/u-boot/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010-2017 CS Systemes d'Information
4 * Florent Trinh Thai <florent.trinh-thai@c-s.fr>
5 * Christophe Leroy <christophe.leroy@c-s.fr>
23 /* DRAM - single read. (offset 0 in upm RAM) */
27 /* DRAM - burst read. (offset 8 in upm RAM) */
33 /* DRAM - single write. (offset 18 in upm RAM) */
37 /* DRAM - burst write. (offset 20 in upm RAM) */
61 do_fixup_by_path_u32(blob, "/soc/cpm", "brg-frequency", in ft_board_setup()
62 bd->bi_busfreq, 1); in ft_board_setup()
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| /openbmc/linux/drivers/iio/proximity/ |
| H A D | sx_common.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
63 * Each phase presented by the sensor is an IIO channel..
67 * @stat_offset: Offset to check phase status.
156 /* 3 is the number of events defined by a single phase. */
|