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Searched +full:rk808 +full:- +full:clkout1 (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/drivers/clk/
H A Dclk-rk808.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Clkout driver for Rockchip RK808
7 * Author:Chris Zhong <zyw@rock-chips.com>
10 #include <linux/clk-provider.h>
14 #include <linux/mfd/rk808.h>
34 return regmap_update_bits(rk808_clkout->regmap, RK808_CLK32OUT_REG, in rk808_clkout2_enable()
55 int ret = regmap_read(rk808_clkout->regmap, RK808_CLK32OUT_REG, &val); in rk808_clkout2_is_prepared()
78 unsigned int idx = clkspec->args[0]; in of_clk_rk808_get()
82 return ERR_PTR(-EINVAL); in of_clk_rk808_get()
85 return idx ? &rk808_clkout->clkout2_hw : &rk808_clkout->clkout1_hw; in of_clk_rk808_get()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
84 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
87 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
89 Clkout1 is always on, Clkout2 can off by control register.
98 multi-function device has one fixed-rate oscillator, clocked
129 be pre-programmed to support other configurations and features not yet
178 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
196 For example, the CDCE925 contains two PLLs with spread-spectrum
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/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Dpx30-engicam-px30-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
13 compatible = "engicam,px30-core", "rockchip,px30";
21 cpu-supply = <&vdd_arm>;
25 cpu-supply = <&vdd_arm>;
29 cpu-supply = <&vdd_arm>;
33 cpu-supply = <&vdd_arm>;
37 cap-mmc-highspeed;
38 mmc-hs200-1_8v;
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H A Drk3399-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/pwm/pwm.h>
12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
19 compatible = "pwm-backlight";
20 brightness-levels = <
53 default-brightness-level = <200>;
57 edp_panel: edp-panel {
58 compatible = "lg,lp079qx1-sp0v";
60 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
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H A Drk3399pro-vmarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include <dt-bindings/pwm/pwm.h>
13 compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
20 vcc3v3_pcie: vcc-pcie-regulator {
21 compatible = "regulator-fixed";
22 enable-active-high;
24 pinctrl-names = "default";
25 pinctrl-0 = <&pcie_pwr>;
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H A Drk3566-lubancat-1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
12 compatible = "embedfire,lubancat-1", "rockchip,rk3566";
21 stdout-path = "serial2:1500000n8";
24 gmac1_clkin: external-gmac1-clock {
25 compatible = "fixed-clock";
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H A Drk3566-soquartz.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
22 stdout-path = "serial2:1500000n8";
25 gmac1_clkin: external-gmac1-clock {
26 compatible = "fixed-clock";
27 clock-frequency = <125000000>;
28 clock-output-names = "gmac1_clkin";
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H A Drk3399-rock-4c-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
11 #include "rk3399-t-opp.dtsi"
15 compatible = "radxa,rock-4c-plus", "rockchip,rk3399";
23 stdout-path = "serial2:1500000n8";
26 clkin_gmac: external-gmac-clock {
27 compatible = "fixed-clock";
28 clock-frequency = <125000000>;
29 clock-output-names = "clkin_gmac";
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H A Drk3566-roc-pc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
12 compatible = "firefly,rk3566-roc-pc", "rockchip,rk3566";
21 stdout-path = "serial2:1500000n8";
24 gmac1_clkin: external-gmac1-clock {
25 compatible = "fixed-clock";
26 clock-frequency = <125000000>;
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H A Drk3566-quartz64-b.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
11 model = "Pine64 RK3566 Quartz64-B Board";
12 compatible = "pine64,quartz64-b", "rockchip,rk3566";
22 stdout-path = "serial2:1500000n8";
25 gmac1_clkin: external-gmac1-clock {
26 compatible = "fixed-clock";
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H A Drk3566-quartz64-a.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
11 model = "Pine64 RK3566 Quartz64-A Board";
12 compatible = "pine64,quartz64-a", "rockchip,rk3566";
21 stdout-path = "serial2:1500000n8";
24 gmac1_clkin: external-gmac1-clock {
25 compatible = "fixed-clock";
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H A Drk3566-anbernic-rgxx3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/linux-event-codes.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/soc/rockchip,vop2.h>
14 stdout-path = "serial2:1500000n8";
17 adc-joystick {
18 compatible = "adc-joystick";
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H A Drk3326-odroid-go.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/rockchip.h>
21 stdout-path = "serial2:115200n8";
25 compatible = "pwm-backlight";
26 power-supply = <&vcc_bl>;
30 builtin_gamepad: gpio-keys {
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/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-vmarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
12 compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288";
14 vccio_flash: vccio-flash-regulator {
15 compatible = "regulator-fixed";
16 regulator-name = "vccio_flash";
17 regulator-min-microvolt = <1800000>;
18 regulator-max-microvolt = <1800000>;
19 vin-supply = <&vcc_io>;
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H A Drv1126-edgeble-neu2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 compatible = "edgeble,neural-compute-module-2", "rockchip,rv1126";
14 vccio_flash: vccio-flash-regulator {
15 compatible = "regulator-fixed";
16 enable-active-high;
18 pinctrl-names = "default";
19 pinctrl-0 = <&flash_vol_sel>;
20 regulator-name = "vccio_flash";
21 regulator-always-on;
22 regulator-boot-on;
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/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Drockchip,rk817.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
21 - rockchip,rk817
29 '#clock-cells':
31 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
35 clock-output-names:
39 rockchip,system-power-controller:
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