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/openbmc/qemu/tests/docker/dockerfiles/
H A Ddebian-riscv64-cross.docker3 # $ lcitool dockerfile --layers all --cross-arch riscv64 debian-sid qemu-minimal
46 dpkg --add-architecture riscv64 && \
54 gcc-riscv64-linux-gnu \
55 libc6-dev:riscv64 \
56 libfdt-dev:riscv64 \
57 libffi-dev:riscv64 \
58 libglib2.0-dev:riscv64 \
59 libpixman-1-dev:riscv64 && \
64 c = '/usr/bin/riscv64-linux-gnu-gcc'\n\
65 ar = '/usr/bin/riscv64-linux-gnu-gcc-ar'\n\
[all …]
H A Ddebian-all-test-cross.docker60 gcc-riscv64-linux-gnu \
61 libc6-dev-riscv64-cross \
70 …ser,mipsel-linux-user,ppc-linux-user,ppc64-linux-user,ppc64le-linux-user,riscv64-linux-user,s390x-…
/openbmc/openbmc/poky/meta/conf/machine/include/riscv/
H A Dtune-riscv.inc3 TUNEVALID[riscv64] = "Enable 64-bit RISC-V optimizations"
13 AVAILTUNES += "riscv64 riscv32 riscv64nc riscv64nf riscv32nf"
16 TUNE_FEATURES:tune-riscv64 = "riscv64"
17 TUNE_ARCH:tune-riscv64 = "riscv64"
18 TUNE_PKGARCH:tune-riscv64 = "riscv64"
19 PACKAGE_EXTRA_ARCHS:tune-riscv64 = "riscv64"
27 TUNE_FEATURES:tune-riscv64nf = "${TUNE_FEATURES:tune-riscv64} riscv64nf"
28 TUNE_ARCH:tune-riscv64nf = "riscv64"
38 TUNE_FEATURES:tune-riscv64nc = "${TUNE_FEATURES:tune-riscv64} riscv64nc"
39 TUNE_ARCH:tune-riscv64nc = "riscv64"
/openbmc/qemu/hw/riscv/
H A DKconfig15 depends on RISCV64
39 depends on RISCV32 || RISCV64
67 depends on RISCV64
76 depends on RISCV32 || RISCV64
88 depends on RISCV32 || RISCV64
108 depends on RISCV32 || RISCV64
/openbmc/qemu/docs/system/riscv/
H A Dvirt.rst67 $ qemu-system-riscv64 \
79 $ qemu-system-riscv64 \
95 $ qemu-system-riscv64 -M virt -device riscv-iommu-pci (...)
142 $ export CROSS_COMPILE=riscv64-linux-
150 $ qemu-system-riscv64 -M virt -smp 4 -m 2G \
163 $ export CROSS_COMPILE=riscv64-linux-
169 Replace ``qemu-system-riscv64`` with ``qemu-system-riscv32`` in the command
182 $ export CROSS_COMPILE=riscv64-linux-
189 $ qemu-system-riscv64 -M virt -smp 4 -m 2G \
199 $ export CROSS_COMPILE=riscv64-linux-
[all …]
H A Dsifive_u.rst121 $ export CROSS_COMPILE=riscv64-linux-
129 $ qemu-system-riscv64 -M sifive_u -smp 5 -m 2G \
154 $ qemu-system-riscv64 -M sifive_u -smp 5 -m 8G \
168 $ export CROSS_COMPILE=riscv64-linux-
174 Replace ``qemu-system-riscv64`` with ``qemu-system-riscv32`` in the command
200 $ qemu-system-riscv64 -M sifive_u -smp 5 -m 2G \
220 $ export CROSS_COMPILE=riscv64-linux-
221 $ export OPENSBI=/path/to/opensbi-riscv64-generic-fw_dynamic.bin
293 $ qemu-system-riscv64 -M sifive_u,msel=11 -smp 5 -m 8G \
302 $ qemu-system-riscv64 -M sifive_u,msel=6 -smp 5 -m 8G \
[all …]
H A Dshakti-c.rst60 $ qemu-system-riscv64 -M shakti_c -nographic \
72 $ export CROSS_COMPILE=riscv64-unknown-elf-
81 $ qemu-system-riscv64 -M shakti_c -nographic \
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/tbb/
H A Dtbb_2021.13.0.bb33 # tmp-glibc/work/riscv64-oe-linux/tbb/1_2021.7.0-r0/recipe-sysroot-native/usr/bin/riscv64-oe-linux/…
34 # tmp-glibc/work/riscv64-oe-linux/tbb/1_2021.7.0-r0/recipe-sysroot-native/usr/bin/riscv64-oe-linux/…
36 EXTRA_OECMAKE:append:riscv64:toolchain-clang = " -DTBB_ENABLE_IPO=OFF "
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-devtools/concurrencykit/concurrencykit/
H A D0001-build-Use-ilp32d-abi-on-riscv32-and-lp64d-on-rv64.patch13 build/ck.build.riscv64 | 2 +-
23 diff --git a/build/ck.build.riscv64 b/build/ck.build.riscv64
25 --- a/build/ck.build.riscv64
26 +++ b/build/ck.build.riscv64
/openbmc/qemu/.gitlab-ci.d/
H A Dcrossbuilds.yml121 # The riscv64 cross-builds currently use a 'sid' container to get
124 cross-riscv64-system:
128 job: riscv64-debian-cross-container
130 IMAGE: debian-riscv64-cross
132 cross-riscv64-user:
136 job: riscv64-debian-cross-container
138 IMAGE: debian-riscv64-cross
/openbmc/openbmc/poky/meta/recipes-core/musl/musl/
H A D0001-Update-syscalls-for-r32-rv64-from-kernel-6.4-through.patch10 arch/riscv64/bits/syscall.h.in | 11 +++++++++++
42 diff --git a/arch/riscv64/bits/syscall.h.in b/arch/riscv64/bits/syscall.h.in
44 --- a/arch/riscv64/bits/syscall.h.in
45 +++ b/arch/riscv64/bits/syscall.h.in
/openbmc/openbmc/poky/meta/recipes-devtools/dpkg/dpkg/
H A D0001-Add-support-for-riscv32-CPU.patch22 riscv64 riscv64 riscv64 64 little
34 riscv64
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-devtools/android-tools/android-tools/core/
H A D0013-adb-Support-riscv64.patch4 Subject: [PATCH 1/1] adb: Support riscv64
10 include/cutils/atomic-riscv64.h | 156 ++++++++++++++++++++++++++++++++
12 create mode 100644 include/cutils/atomic-riscv64.h
23 +#include <cutils/atomic-riscv64.h>
27 diff --git a/include/cutils/atomic-riscv64.h b/include/cutils/atomic-riscv64.h
31 +++ b/include/cutils/atomic-riscv64.h
/openbmc/qemu/tests/uefi-test-tools/
H A Duefi-test-build.config25 # riscv64
27 [build.riscv64]
31 arch = RISCV64
32 cpy1 = RISCV64/BiosTablesTest.efi bios-tables-test.riscv64.efi
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/mozjs/mozjs-128/
H A Driscv32.patch25 elif cpu in ("riscv64", "riscv64gc"):
26 canonical_cpu = "riscv64"
37 "riscv64": 64,
45 ("riscv64", "__riscv && __riscv_xlen == 64"),
57 "riscv64-unknown-linux-gnu": little_endian + {"__riscv": 1, "__riscv_xlen": 64},
H A Driscv.patch12 "riscv64-unknown-linux-gnu": little_endian + {"__riscv": 1, "__riscv_xlen": 64},
26 - | riscv | riscv32 | riscv32be | riscv64 | riscv64be \
27 + | riscv | riscv32 | riscv32be | riscv32gc | riscv64 | riscv64be | riscv64gc \
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-devtools/nodejs/nodejs/
H A D0001-liftoff-Correct-function-signatures.patch17 .../src/wasm/baseline/riscv/liftoff-assembler-riscv64-inl.h | 2 +-
57 …c/wasm/baseline/riscv/liftoff-assembler-riscv64-inl.h b/deps/v8/src/wasm/baseline/riscv/liftoff-as…
59 --- a/deps/v8/src/wasm/baseline/riscv/liftoff-assembler-riscv64-inl.h
60 +++ b/deps/v8/src/wasm/baseline/riscv/liftoff-assembler-riscv64-inl.h
/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/flite/flite/
H A D0001-Remove-defining-const-as-nothing.patch10 | /mnt/b/yoe/master/build/tmp/work/riscv64-yoe-linux/flite/2.2/recipe-sysroot/usr/include/bits/stdl…
13 | /mnt/b/yoe/master/build/tmp/work/riscv64-yoe-linux/flite/2.2/recipe-sysroot/usr/include/bits/stdl…
16 | /mnt/b/yoe/master/build/tmp/work/riscv64-yoe-linux/flite/2.2/recipe-sysroot/usr/include/bits/stdl…
19 | /mnt/b/yoe/master/build/tmp/work/riscv64-yoe-linux/flite/2.2/recipe-sysroot/usr/include/bits/stdl…
22 | /mnt/b/yoe/master/build/tmp/work/riscv64-yoe-linux/flite/2.2/recipe-sysroot/usr/include/bits/stdl…
/openbmc/openbmc/poky/meta/classes-recipe/
H A Dlinuxloader.bbclass28 elif targetarch.startswith("riscv64"):
29 ldso_arch = "riscv64${@['', '-sf'][d.getVar('TARGET_FPU') == 'soft']}"
63 elif targetarch.startswith("riscv64"):
64 …dynamic_loader = "${base_libdir}/ld-linux-riscv64-lp64${@['d', ''][d.getVar('TARGET_FPU') == 'soft…
/openbmc/openbmc/poky/meta/recipes-devtools/systemd-bootchart/systemd-bootchart/
H A D0001-Add-riscv32-support.patch22 SET_ARCH(RISCV64, riscv64*)
42 # define define LIB_ARCH_TUPLE "riscv64-linux-gnu"
/openbmc/openbmc/meta-security/recipes-core/packagegroup/
H A Dpackagegroup-core-security.bb56 ${@bb.utils.contains_any("TUNE_FEATURES", "riscv32 riscv64", "", " arpwatch",d)} \
59 …${@bb.utils.contains_any("TUNE_FEATURES", "riscv32 riscv64", "", " clamav clamav-daemon clamav-fre…
82 RDEPENDS:packagegroup-security-ids:remove:riscv64 = "suricata"
115 RDEPENDS:packagegroup-security-ptest-packages:remove:riscv64 = "suricata-ptest"
/openbmc/qemu/docs/specs/
H A Driscv-iommu.rst27 $ qemu-system-riscv64 -M virt -device riscv-iommu-pci,[optional_pci_opts] (...)
50 $ qemu-system-riscv64 \
57 $ qemu-system-riscv64 \
73 $ qemu-system-riscv64 -M virt \
/openbmc/openbmc/poky/meta/conf/machine/
H A Dqemuriscv64.conf2 #@NAME: generic riscv64 machine
3 #@DESCRIPTION: Machine configuration for running a generic riscv64
/openbmc/qemu/bsd-user/riscv/
H A Dtarget.h2 * Riscv64 general target stuff that's common to all aarch details
13 * riscv64 ABI does not 'lump' the registers for 64-bit args.
/openbmc/qemu/pc-bios/descriptors/
H A D60-edk2-riscv64.json2 "description": "UEFI firmware for riscv64",
19 "architecture": "riscv64",

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