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/openbmc/openbmc/poky/meta/conf/machine/include/riscv/
H A Dtune-riscv.inc4 TUNEVALID[riscv32] = "Enable 32-bit RISC-V optimizations"
13 AVAILTUNES += "riscv64 riscv32 riscv64nc riscv64nf riscv32nf"
21 TUNE_FEATURES:tune-riscv32 = "riscv32"
22 TUNE_ARCH:tune-riscv32 = "riscv32"
23 TUNE_PKGARCH:tune-riscv32 = "riscv32"
24 PACKAGE_EXTRA_ARCHS:tune-riscv32 = "riscv32"
32 TUNE_FEATURES:tune-riscv32nf = "${TUNE_FEATURES:tune-riscv32} riscv32nf"
33 TUNE_ARCH:tune-riscv32nf = "riscv32"
/openbmc/qemu/hw/riscv/
H A DKconfig31 depends on RISCV32 || RISCV64
39 depends on RISCV32
47 depends on RISCV32 || RISCV64
84 depends on RISCV32 || RISCV64
96 depends on RISCV32 || RISCV64
116 depends on RISCV32 || RISCV64
/openbmc/openbmc/meta-openembedded/meta-python/recipes-devtools/python/python3-pyruvate/
H A D0001-musl-riscv32-Define-F_SETLK-F_SETLKW-and-fix-F_GETLK.patch4 Subject: [PATCH] musl/riscv32: Define F_SETLK, F_SETLKW and fix F_GETLK
12 src/unix/linux_like/linux/musl/b32/riscv32/mod.rs | 6 ++++--
15 …iff --git a/src/unix/linux_like/linux/musl/b32/riscv32/mod.rs b/src/unix/linux_like/linux/musl/b32…
17 --- a/src/unix/linux_like/linux/musl/b32/riscv32/mod.rs
18 +++ b/src/unix/linux_like/linux/musl/b32/riscv32/mod.rs
H A D0001-musl-Define-O_LARGEFILE-for-riscv32.patch4 Subject: [PATCH] musl: Define O_LARGEFILE for riscv32
9 src/unix/linux_like/linux/musl/b32/riscv32/mod.rs | 1 +
12 --- a/src/unix/linux_like/linux/musl/b32/riscv32/mod.rs
13 +++ b/src/unix/linux_like/linux/musl/b32/riscv32/mod.rs
/openbmc/openbmc/poky/meta/recipes-devtools/dpkg/dpkg/
H A D0001-Add-support-for-riscv32-CPU.patch4 Subject: [PATCH] Add support for riscv32 CPU
21 +riscv32 riscv32 riscv32 32 little
33 + riscv32
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/mozjs/mozjs-128/
H A Driscv32.patch4 Subject: [PATCH] Add RISCV32 support
22 + elif cpu in ("riscv32", "riscv32gc"):
23 + canonical_cpu = "riscv32"
36 + 'riscv32': 32,
44 + ("riscv32", "__riscv && __riscv_xlen == 32"),
56 + "riscv32-unknown-linux-gnu": little_endian + {"__riscv": 1, "__riscv_xlen": 32},
H A Driscv.patch11 "riscv32-unknown-linux-gnu": little_endian + {"__riscv": 1, "__riscv_xlen": 32},
26 - | riscv | riscv32 | riscv32be | riscv64 | riscv64be \
27 + | riscv | riscv32 | riscv32be | riscv32gc | riscv64 | riscv64be | riscv64gc \
/openbmc/openbmc/poky/meta/conf/machine/
H A Dqemuriscv32.conf2 #@NAME: generic riscv32 machine
3 #@DESCRIPTION: Machine configuration for running a generic riscv32
7 DEFAULTTUNE = "riscv32"
/openbmc/openbmc/poky/meta/recipes-core/packagegroups/
H A Dpackagegroup-core-tools-profile.bb27 PERF:riscv32 = ""
33 SYSTEMTAP:riscv32 = ""
37 LTTNGTOOLS:riscv32 = ""
54 VALGRIND:riscv32 = ""
/openbmc/openbmc/poky/meta/recipes-core/musl/musl/
H A D0001-Update-syscalls-for-r32-rv64-from-kernel-6.4-through.patch9 arch/riscv32/bits/syscall.h.in | 11 +++++++++++
13 diff --git a/arch/riscv32/bits/syscall.h.in b/arch/riscv32/bits/syscall.h.in
15 --- a/arch/riscv32/bits/syscall.h.in
16 +++ b/arch/riscv32/bits/syscall.h.in
/openbmc/openbmc/poky/meta/recipes-kernel/lttng/
H A Dlttng-platforms.inc19 # lttng-tools requires SYS_ppoll and SYS_pselect6 which are not supported on riscv32.
20 # It's also turned off for riscv32 in meta-riscv. See https://github.com/riscv/meta-riscv/blob/mast…
21 COMPATIBLE_HOST:riscv32:pn-lttng-tools = "null"
/openbmc/openbmc/poky/meta/recipes-devtools/systemd-bootchart/systemd-bootchart/
H A D0001-Add-riscv32-support.patch4 Subject: [PATCH] Add riscv32 support
23 +SET_ARCH(RISCV32, riscv32*)
45 +# define define LIB_ARCH_TUPLE "riscv32-linux-gnu"
/openbmc/openbmc/poky/meta/conf/distro/include/
H A Dptest-packagelists.inc92 PTESTS_FAST:remove:riscv32 = "qemu"
93 PTESTS_PROBLEMS:append:riscv32 = " qemu"
134 PTESTS_SLOW:remove:riscv32 = "lttng-tools strace "
135 PTESTS_PROBLEMS:append:riscv32 = " lttng-tools strace"
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-devtools/concurrencykit/
H A Dconcurrencykit_git.bb15 file://0001-build-Use-ilp32d-abi-on-riscv32-and-lp64d-on-rv64.patch"
19 COMPATIBLE_HOST = "(arm|aarch64|i.86|x86_64|powerpc|powerpc64|riscv32|riscv64).*-linux*"
25 PLAT:riscv32 = "riscv"
/openbmc/openbmc/poky/meta/recipes-devtools/clang/clang/
H A D0023-compiler-rt-Enable-__int128-for-ppc32.patch53 - # For RISCV32, we must force enable int128 for compiling long
54 + # For RISCV32/PPC32, we must force enable int128 for compiling long
56 - if(COMPILER_RT_ENABLE_SOFTWARE_INT128 OR "${arch}" STREQUAL "riscv32")
57 + if(COMPILER_RT_ENABLE_SOFTWARE_INT128 OR "${arch}" STREQUAL "riscv32" OR "${arch}" STREQUAL …
/openbmc/openbmc/poky/meta/classes-recipe/
H A Dlinuxloader.bbclass30 elif targetarch.startswith("riscv32"):
31 ldso_arch = "riscv32${@['', '-sf'][d.getVar('TARGET_FPU') == 'soft']}"
65 elif targetarch.startswith("riscv32"):
66 …dynamic_loader = "${base_libdir}/ld-linux-riscv32-ilp32${@['d', ''][d.getVar('TARGET_FPU') == 'sof…
/openbmc/openbmc/poky/meta/recipes-devtools/go/
H A Dgo_1.24.3.bb12 # mips/rv64 doesn't support -buildmode=pie, so skip the QA checking for mips/riscv32 and its
15 if 'mips' in d.getVar('TARGET_ARCH') or 'riscv32' in d.getVar('TARGET_ARCH'):
/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/dav1d/
H A Ddav1d_1.5.1.bb19 # RVV assembler routines are not yet available for RISCV32
20 EXTRA_OEMESON:append:riscv32 = " -Denable_asm=false"
/openbmc/openbmc/poky/meta/conf/
H A Dimage-uefi.conf21 EFI_ARCH:riscv32 = "riscv32"
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/lgi/
H A Dlua-lgi_0.9.2.bb26 # ppc64/riscv64/riscv32 is not supported on luajit
27 COMPATIBLE_HOST:riscv32 = "null"
/openbmc/openbmc/poky/meta/recipes-core/busybox/busybox/
H A D0001-hwclock-Check-for-SYS_settimeofday-before-calling-sy.patch6 Some newer architectures e.g. RISCV32 have 64bit time_t from get go and
9 syscall. Fixes build for riscv32 and it will bail out at runtime.
19 architecture (riscv32), which seems like a reasonable trade-off
/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/webrtc-audio-processing/
H A Dwebrtc-audio-processing-2_2.1.bb19 # | riscv32-yoe-linux-musl-ld.lld: error: undefined reference: __atomic_store_8
20 LDFLAGS:append:riscv32 = " -latomic"
/openbmc/openbmc/meta-security/recipes-core/packagegroup/
H A Dpackagegroup-core-security.bb56 ${@bb.utils.contains_any("TUNE_FEATURES", "riscv32 riscv64", "", " arpwatch",d)} \
59 …${@bb.utils.contains_any("TUNE_FEATURES", "riscv32 riscv64", "", " clamav clamav-daemon clamav-fre…
81 RDEPENDS:packagegroup-security-ids:remove:riscv32 = "suricata"
114 RDEPENDS:packagegroup-security-ptest-packages:remove:riscv32 = "suricata-ptest"
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/libbacktrace/
H A Dlibbacktrace_git.bb31 # libunwind does not support RISCV32 yet
32 COMPATIBLE_HOST:riscv32 = "null"
/openbmc/openbmc/meta-openembedded/meta-python/recipes-devtools/python/
H A Dpython3-pyruvate_1.2.1.bb14 …file://0001-musl-riscv32-Define-F_SETLK-F_SETLKW-and-fix-F_GETLK.patch;patchdir=${UNPACKDIR}/cargo…
16 …file://0001-musl-Define-O_LARGEFILE-for-riscv32.patch;patchdir=${UNPACKDIR}/cargo_home/bitbake/lib…
33 RUSTFLAGS:append:riscv32 = " --cfg crossbeam_no_atomic_64"

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