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/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dhisilicon-femac.txt4 - compatible: should contain one of the following version strings:
5 * "hisilicon,hisi-femac-v1"
6 * "hisilicon,hisi-femac-v2"
7 and the soc string "hisilicon,hi3516cv300-femac".
8 - reg: specifies base physical address(s) and size of the device registers.
11 - interrupts: should contain the MAC interrupt.
12 - clocks: A phandle to the MAC main clock.
13 - resets: should contain the phandle to the MAC reset signal(required) and
14 the PHY reset signal(optional).
15 - reset-names: should contain the reset signal name "mac"(required)
[all …]
H A Dhisilicon-hix5hd2-gmac.txt4 - compatible: should contain one of the following SoC strings:
5 * "hisilicon,hix5hd2-gmac"
6 * "hisilicon,hi3798cv200-gmac"
7 * "hisilicon,hi3516a-gmac"
9 * "hisilicon,hisi-gmac-v1"
10 * "hisilicon,hisi-gmac-v2"
13 - reg: specifies base physical address(s) and size of the device registers.
16 - interrupts: should contain the MAC interrupt.
17 - #address-cells: must be <1>.
18 - #size-cells: must be <0>.
[all …]
H A Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
[all …]
H A Dqcom,ethqos.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bhupesh Sharma <bhupesh.sharma@linaro.org>
17 - $ref: snps,dwmac.yaml#
22 - qcom,qcs404-ethqos
23 - qcom,sa8775p-ethqos
24 - qcom,sc8280xp-ethqos
25 - qcom,sm8150-ethqos
30 reg-names:
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568-fastrhino-r68s.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "rk3568-fastrhino-r66s.dtsi"
7 compatible = "lunzn,fastrhino-r68s", "rockchip,rk3568";
15 adc-keys {
16 compatible = "adc-keys";
17 io-channels = <&saradc 0>;
18 io-channel-names = "buttons";
19 keyup-threshold-microvolt = <1800000>;
21 button-recovery {
24 press-threshold-microvolt = <1750>;
[all …]
H A Drk3568-nanopi-r5s.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
9 /dts-v1/;
10 #include "rk3568-nanopi-r5s.dtsi"
14 compatible = "friendlyarm,nanopi-r5s", "rockchip,rk3568";
20 gpio-leds {
21 compatible = "gpio-leds";
22 pinctrl-names = "default";
23 pinctrl-0 = <&lan1_led_pin>, <&lan2_led_pin>, <&power_led_pin>, <&wan_led_pin>;
25 led-lan1 {
28 function-enumerator = <1>;
[all …]
H A Dpx30-engicam-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
14 vcc5v0_sys: vcc5v0-sys {
15 compatible = "regulator-fixed";
16 regulator-name = "vcc5v0_sys"; /* +5V */
17 regulator-always-on;
18 regulator-boot-on;
19 regulator-min-microvolt = <5000000>;
20 regulator-max-microvolt = <5000000>;
23 sdio_pwrseq: sdio-pwrseq {
24 compatible = "mmc-pwrseq-simple";
[all …]
H A Drk3399-ficus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 /dts-v1/;
10 #include "rk3399-rock960.dtsi"
17 stdout-path = "serial2:1500000n8";
20 clkin_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 clock-frequency = <125000000>;
23 clock-output-names = "clkin_gmac";
24 #clock-cells = <0>;
28 compatible = "gpio-leds";
[all …]
H A Drk3568-roc-pc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include <dt-bindings/soc/rockchip,vop2.h>
15 compatible = "firefly,rk3568-roc-pc", "rockchip,rk3568";
25 stdout-path = "serial2:1500000n8";
28 dc_12v: dc-12v-regulator {
29 compatible = "regulator-fixed";
30 regulator-name = "dc_12v";
[all …]
H A Drk3568-lubancat-2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,vop2.h>
17 compatible = "embedfire,lubancat-2", "rockchip,rk3568";
27 stdout-path = "serial2:1500000n8";
31 compatible = "gpio-leds";
33 user_led: user-led {
[all …]
H A Drk3568-bpi-r2-pro.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Author: Frank Wunderlich <frank-w@public-files.de>
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/soc/rockchip,vop2.h>
15 model = "Bananapi-R2 Pro (RK3568) DDR4 Board";
16 compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568";
26 stdout-path = "serial2:1500000n8";
[all …]
/openbmc/u-boot/doc/device-tree-bindings/net/
H A Dstmmac.txt4 - compatible: Should be "snps,dwmac-<ip_version>" "snps,dwmac"
5 For backwards compatibility: "st,spear600-gmac" is also supported.
6 - reg: Address and length of the register set for the device
7 - interrupt-parent: Should be the phandle for the interrupt controller
9 - interrupts: Should contain the STMMAC interrupts
10 - interrupt-names: Should contain the interrupt names "macirq"
13 - phy-mode: See ethernet.txt file in the same directory.
14 - snps,reset-gpio gpio number for phy reset.
15 - snps,reset-active-low boolean flag to indicate if phy reset is active low.
16 - snps,reset-delays-us is triplet of delays
[all …]
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxbb-p201.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-gxbb-p20x.dtsi"
13 compatible = "amlogic,p201", "amlogic,meson-gxbb";
19 pinctrl-0 = <&eth_rmii_pins>;
20 pinctrl-names = "default";
21 phy-mode = "rmii";
23 snps,reset-gpio = <&gpio GPIOZ_14 0>;
24 snps,reset-delays-us = <0>, <10000>, <1000000>;
25 snps,reset-active-low;
/openbmc/u-boot/arch/arm/dts/
H A Drv1108-evb.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
12 compatible = "rockchip,rv1108-evb", "rockchip,rv1108";
20 stdout-path = "serial2:1500000n8";
23 vcc5v0_otg: vcc5v0-otg-drv {
24 compatible = "regulator-fixed";
25 enable-active-high;
26 regulator-name = "vcc5v0_otg";
28 regulator-min-microvolt = <5000000>;
29 regulator-max-microvolt = <5000000>;
[all …]
H A Drk3399-ficus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 /dts-v1/;
10 #include "rk3399-rock960.dtsi"
11 #include "rk3399-sdram-ddr3-1600.dtsi"
18 stdout-path = "serial2:1500000n8";
21 clkin_gmac: external-gmac-clock {
22 compatible = "fixed-clock";
23 clock-frequency = <125000000>;
24 clock-output-names = "clkin_gmac";
25 #clock-cells = <0>;
[all …]
H A Dstih410-b2260.dts9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
15 compatible = "st,stih410-b2260", "st,stih410";
19 linux,stdout-path = &uart1;
20 stdout-path = &uart1;
36 compatible = "gpio-leds";
40 linux,default-trigger = "heartbeat";
41 default-state = "off";
47 default-state = "off";
53 default-state = "off";
[all …]
H A Drk3229-evb.dts1 // SPDX-License-Identifier: GPL-2.0+ OR X11
6 /dts-v1/;
12 compatible = "rockchip,rk3229-evb", "rockchip,rk3229";
15 stdout-path = &uart2;
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "ext_gmac";
27 #clock-cells = <0>;
30 vcc_phy: vcc-phy-regulator {
31 compatible = "regulator-fixed";
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dqcs404-evb-4000.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include "qcs404-evb.dtsi"
13 compatible = "qcom,qcs404-evb-4000", "qcom,qcs404-evb",
20 snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
21 snps,reset-active-low;
22 snps,reset-delays-us = <0 10000 10000>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&ethernet_defaults>;
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstih410-b2260.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
12 compatible = "st,stih410-b2260", "st,stih410";
15 stdout-path = &uart1;
29 compatible = "gpio-leds";
30 led-user-green-1 {
33 linux,default-trigger = "heartbeat";
34 default-state = "off";
37 led-user-green-2 {
[all …]
H A Dstih418-b2264.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
11 compatible = "st,stih418-b2264", "st,stih418";
14 stdout-path = &sbc_serial0;
24 operating-points-v2 = <&cpu_opp_table>;
25 /* u-boot puts hpen in SBC dmem at 0xb8 offset */
26 cpu-release-addr = <0x94100b8>;
29 operating-points-v2 = <&cpu_opp_table>;
30 /* u-boot puts hpen in SBC dmem at 0xb8 offset */
[all …]
/openbmc/u-boot/doc/
H A DREADME.i2c4 While I2C supports multi-master buses this is difficult to get right.
6 Clock-stretching and the arbitrary time that an I2C transaction can take
8 When one or more masters can be reset independently part-way through a
11 U-Boot provides a scheme based on two 'claim' GPIOs, one driven by the
18 Since U-Boot runs on the AP, the terminology used is 'our' claim GPIO,
23 i2c-arb-gpio-challenge for the implementation.
28 - AP_CLAIM: output from AP, signalling to the EC that the AP wants the bus
29 - EC_CLAIM: output from EC, signalling to the AP that the EC wants the bus
50 To release the bus, just de-assert the claim line.
52 Typical delays are:
[all …]
/openbmc/linux/drivers/net/ethernet/stmicro/stmmac/
H A Dstmmac_mdio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 STMMAC Ethernet Driver -- MDIO bus implementation
6 Copyright (C) 2007-2009 STMicroelectronics Ltd
54 tmp = readl(priv->ioaddr + XGMAC_MDIO_C22P); in stmmac_xgmac2_c45_format()
56 writel(tmp, priv->ioaddr + XGMAC_MDIO_C22P); in stmmac_xgmac2_c45_format()
67 if (priv->synopsys_id < DWXGMAC_CORE_2_20) { in stmmac_xgmac2_c22_format()
71 tmp = readl(priv->ioaddr + XGMAC_MDIO_C22P); in stmmac_xgmac2_c22_format()
76 writel(tmp, priv->ioaddr + XGMAC_MDIO_C22P); in stmmac_xgmac2_c22_format()
84 unsigned int mii_address = priv->hw->mii.addr; in stmmac_xgmac2_mdio_read()
85 unsigned int mii_data = priv->hw->mii.data; in stmmac_xgmac2_mdio_read()
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drockchip-radxa-dalang-carrier.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/pwm/pwm.h>
11 clkin_gmac: external-gmac-clock {
12 compatible = "fixed-clock";
13 clock-frequency = <125000000>;
14 clock-output-names = "clkin_gmac";
15 #clock-cells = <0>;
18 sdio_pwrseq: sdio-pwrseq {
19 compatible = "mmc-pwrseq-simple";
21 clock-names = "ext_clock";
[all …]
H A Drk3288-rock2-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/pwm/pwm.h>
12 emmc_pwrseq: emmc-pwrseq {
13 compatible = "mmc-pwrseq-emmc";
14 pinctrl-0 = <&emmc_reset>;
15 pinctrl-names = "default";
16 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
[all …]
/openbmc/linux/Documentation/admin-guide/blockdev/
H A Dparide.rst5 PARIDE v1.03 (c) 1997-8 Grant Guenther <grant@torque.net>
12 to personal computers, many external devices such as portable hard-disk,
13 CD-ROM, LS-120 and tape drives use the parallel port to connect to their
14 host computer. While some devices (notably scanners) use ad-hoc methods
17 a parallel-port adapter chip added in. Some of the original parallel port
19 (The Iomega PPA-3 adapter used in the ZIP drives is an example of this
27 which is then connected to a floppy-tape mechanism. The vast majority
30 were to open up a parallel port CD-ROM drive, for instance, one would
31 find a standard ATAPI CD-ROM drive, a power supply, and a single adapter
33 IDE cable. It is usually possible to exchange the CD-ROM device with
[all …]

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