1f70e9d88SZhangfei GaoHisilicon hix5hd2 gmac controller 2f70e9d88SZhangfei Gao 3f70e9d88SZhangfei GaoRequired properties: 4d0fb6ba7SDongpo Li- compatible: should contain one of the following SoC strings: 5f7ca8e3bSDongpo Li * "hisilicon,hix5hd2-gmac" 6f7ca8e3bSDongpo Li * "hisilicon,hi3798cv200-gmac" 7f7ca8e3bSDongpo Li * "hisilicon,hi3516a-gmac" 8d0fb6ba7SDongpo Li and one of the following version string: 9f7ca8e3bSDongpo Li * "hisilicon,hisi-gmac-v1" 10f7ca8e3bSDongpo Li * "hisilicon,hisi-gmac-v2" 11f7ca8e3bSDongpo Li The version v1 includes SoCs hix5hd2. 12f7ca8e3bSDongpo Li The version v2 includes SoCs hi3798cv200, hi3516a. 13f70e9d88SZhangfei Gao- reg: specifies base physical address(s) and size of the device registers. 14f70e9d88SZhangfei Gao The first region is the MAC register base and size. 15f70e9d88SZhangfei Gao The second region is external interface control register. 16f70e9d88SZhangfei Gao- interrupts: should contain the MAC interrupt. 17f70e9d88SZhangfei Gao- #address-cells: must be <1>. 18f70e9d88SZhangfei Gao- #size-cells: must be <0>. 19f70e9d88SZhangfei Gao- phy-mode: see ethernet.txt [1]. 20f70e9d88SZhangfei Gao- phy-handle: see ethernet.txt [1]. 21f70e9d88SZhangfei Gao- clocks: clock phandle and specifier pair. 227087140dSDongpo Li- clock-names: contain the clock name "mac_core"(required) and "mac_ifc"(optional). 237087140dSDongpo Li- resets: should contain the phandle to the MAC core reset signal(optional), 247087140dSDongpo Li the MAC interface reset signal(optional) 257087140dSDongpo Li and the PHY reset signal(optional). 267087140dSDongpo Li- reset-names: contain the reset signal name "mac_core"(optional), 277087140dSDongpo Li "mac_ifc"(optional) and "phy"(optional). 287087140dSDongpo Li- hisilicon,phy-reset-delays-us: triplet of delays if PHY reset signal given. 297087140dSDongpo Li The 1st cell is reset pre-delay in micro seconds. 307087140dSDongpo Li The 2nd cell is reset pulse in micro seconds. 317087140dSDongpo Li The 3rd cell is reset post-delay in micro seconds. 32f70e9d88SZhangfei Gao 33687e3d55SPetr ŠtetiarThe MAC address will be determined using the properties defined in 34687e3d55SPetr Štetiarethernet.txt[1]. 35687e3d55SPetr Štetiar 36f70e9d88SZhangfei Gao- PHY subnode: inherits from phy binding [2] 37f70e9d88SZhangfei Gao 38f70e9d88SZhangfei Gao[1] Documentation/devicetree/bindings/net/ethernet.txt 39f70e9d88SZhangfei Gao[2] Documentation/devicetree/bindings/net/phy.txt 40f70e9d88SZhangfei Gao 41f70e9d88SZhangfei GaoExample: 42f70e9d88SZhangfei Gao gmac0: ethernet@f9840000 { 43f7ca8e3bSDongpo Li compatible = "hisilicon,hi3798cv200-gmac", "hisilicon,hisi-gmac-v2"; 44f70e9d88SZhangfei Gao reg = <0xf9840000 0x1000>,<0xf984300c 0x4>; 45f70e9d88SZhangfei Gao interrupts = <0 71 4>; 46f70e9d88SZhangfei Gao #address-cells = <1>; 47f70e9d88SZhangfei Gao #size-cells = <0>; 487087140dSDongpo Li phy-mode = "rgmii"; 49f70e9d88SZhangfei Gao phy-handle = <&phy2>; 50f70e9d88SZhangfei Gao mac-address = [00 00 00 00 00 00]; 517087140dSDongpo Li clocks = <&crg HISTB_ETH0_MAC_CLK>, <&crg HISTB_ETH0_MACIF_CLK>; 527087140dSDongpo Li clock-names = "mac_core", "mac_ifc"; 537087140dSDongpo Li resets = <&crg 0xcc 8>, <&crg 0xcc 10>, <&crg 0xcc 12>; 547087140dSDongpo Li reset-names = "mac_core", "mac_ifc", "phy"; 557087140dSDongpo Li hisilicon,phy-reset-delays-us = <10000 10000 30000>; 56f70e9d88SZhangfei Gao 57f70e9d88SZhangfei Gao phy2: ethernet-phy@2 { 58f70e9d88SZhangfei Gao reg = <2>; 59f70e9d88SZhangfei Gao }; 60f70e9d88SZhangfei Gao }; 61