Searched +full:regulator +full:- +full:vddpu (Results 1 – 7 of 7) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/regulator/ |
H A D | anatop-regulator.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/regulator/anatop-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> 13 - $ref: regulator.yaml# 17 const: fsl,anatop-regulator 19 regulator-name: true 21 anatop-reg-offset: 25 anatop-vol-bit-shift: [all …]
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/openbmc/linux/drivers/regulator/ |
H A D | anatop-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0+ 15 #include <linux/regulator/driver.h> 16 #include <linux/regulator/of_regulator.h> 17 #include <linux/regulator/machine.h> 43 if (anatop_reg->delay_bit_width && new_sel > old_sel) { in anatop_regmap_set_voltage_time_sel() 50 regmap_read(reg->regmap, anatop_reg->delay_reg, &val); in anatop_regmap_set_voltage_time_sel() 51 val = (val >> anatop_reg->delay_bit_shift) & in anatop_regmap_set_voltage_time_sel() 52 ((1 << anatop_reg->delay_bit_width) - 1); in anatop_regmap_set_voltage_time_sel() 53 ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES << in anatop_regmap_set_voltage_time_sel() 65 sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; in anatop_regmap_enable() [all …]
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/openbmc/linux/drivers/cpufreq/ |
H A D | imx6q-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0-only 11 #include <linux/nvmem-consumer.h> 16 #include <linux/regulator/consumer.h> 22 static struct regulator *arm_reg; 23 static struct regulator *pu_reg; 24 static struct regulator *soc_reg; 81 dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n", in imx6q_set_target() 90 dev_err(cpu_dev, "failed to scale vddpu up: %d\n", ret); in imx6q_set_target() 114 * - Enable pll2_pfd2_396m_clk and reparent pll1_sw_clk to it in imx6q_set_target() 115 * - Reprogram pll1_sys_clk and reparent pll1_sw_clk back to it in imx6q_set_target() [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | imx6sl.dtsi | 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include "imx6sl-pinfunc.h" 12 #include <dt-bindings/clock/imx6sl-clock.h> 15 #address-cells = <1>; 16 #size-cells = <1>; 19 * pre-existing /chosen node to be available to insert the 21 * Also for U-Boot there must be a pre-existing /memory node. 47 #address-cells = <1>; 48 #size-cells = <0>; 51 compatible = "arm,cortex-a9"; [all …]
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H A D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 16 * Also for U-Boot there must be a pre-existing /memory node. 55 compatible = "fsl,imx-ckil", "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <32768>; [all …]
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; 51 #size-cells = <0>; 54 compatible = "arm,cortex-a9"; [all …]
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H A D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 * pre-existing /chosen node to be available to insert the 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <32768>; [all …]
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