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12

/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dlantiq,vrx200-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/lantiq,vrx200-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
13 "#phy-cells":
15 description: selects the PHY mode as defined in <dt-bindings/phy/phy-lantiq-vrx200-pcie.h>
19 - lantiq,vrx200-pcie-phy
20 - lantiq,arx300-pcie-phy
27 - description: PHY module clock
[all …]
/openbmc/linux/drivers/phy/lantiq/
H A Dphy-lantiq-rcu-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Lantiq XWAY SoC RCU module based USB 1.1/2.0 PHY driver
6 * Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
21 /* Transmitter HS Pre-Emphasis Enable */
69 .compatible = "lantiq,ase-usb2-phy",
73 .compatible = "lantiq,danube-usb2-phy",
77 .compatible = "lantiq,xrx100-usb2-phy",
81 .compatible = "lantiq,xrx200-usb2-phy",
85 .compatible = "lantiq,xrx300-usb2-phy",
96 if (priv->reg_bits->have_ana_cfg) { in ltq_rcu_usb2_phy_init()
[all …]
H A Dphy-lantiq-vrx200-pcie.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Copyright (C) 2009-2015 Lei Chuanhua <chuanhua.lei@lantiq.com>
27 #include <dt-bindings/phy/phy-lantiq-vrx200-pcie.h>
103 regmap_write(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL1, 0x120e); in ltq_vrx200_pcie_phy_common_setup()
106 regmap_write(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL2, 0x39d7); in ltq_vrx200_pcie_phy_common_setup()
107 regmap_write(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL3, 0x0900); in ltq_vrx200_pcie_phy_common_setup()
110 regmap_write(priv->phy_regmap, PCIE_PHY_RX1_EI, 0x0004); in ltq_vrx200_pcie_phy_common_setup()
111 regmap_write(priv->phy_regmap, PCIE_PHY_RX1_A_CTRL, 0x6803); in ltq_vrx200_pcie_phy_common_setup()
113 regmap_update_bits(priv->phy_regmap, PCIE_PHY_TX1_CTRL1, in ltq_vrx200_pcie_phy_common_setup()
118 regmap_write(priv->phy_regmap, PCIE_PHY_TX1_A_CTRL2, 0x0706); in ltq_vrx200_pcie_phy_common_setup()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mips/lantiq/
H A Drcu.txt1 Lantiq XWAY SoC RCU binding
4 This binding describes the RCU (reset controller unit) multifunction device,
5 where each sub-device has its own set of registers.
7 The RCU register range is used for multiple purposes. Mostly one device
10 With this patch all accesses to the RCU registers will go through
14 -------------------------------------------------------------------------------
16 - compatible : The first and second values must be:
17 "lantiq,xrx200-rcu", "simple-mfd", "syscon"
18 - reg : The address and length of the system control registers
21 -------------------------------------------------------------------------------
[all …]
/openbmc/linux/net/mac80211/
H A Dsta_info.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright 2002-2005, Devicescape Software, Inc.
4 * Copyright 2013-2014 Intel Mobile Communications GmbH
5 * Copyright(c) 2015-2017 Intel Deutschland GmbH
6 * Copyright(c) 2020-2024 Intel Corporation
24 * enum ieee80211_sta_info_flags - Stations flags
31 * @WLAN_STA_PS_STA: Station is in power-save mode
35 * @WLAN_STA_SHORT_PREAMBLE: Station is capable of receiving short-preamble
45 * power-save mode logically to flush frames that might still
47 * @WLAN_STA_PSPOLL: Station sent PS-poll while driver was keeping
[all …]
/openbmc/linux/drivers/net/ethernet/intel/fm10k/
H A Dfm10k.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
43 struct rcu_head rcu; member
56 test_bit(__FM10K_TX_DETECT_HANG, (ring)->state)
58 set_bit(__FM10K_TX_DETECT_HANG, (ring)->state)
60 clear_bit(__FM10K_TX_DETECT_HANG, (ring)->state)
120 * the hardware register offset
169 return &ring->netdev->_tx[ring->queue_index]; in txring_txq()
174 for (pos = &(head).ring[(head).count]; (--pos) >= (head).ring;)
198 struct rcu_head rcu; /* to avoid race with update stats on free */ member
[all …]
/openbmc/qemu/include/exec/
H A Dmemory.h10 * the COPYING file in the top-level directory.
19 #include "exec/cpu-common.h"
30 #include "qemu/rcu.h"
35 #define MAX_PHYS_ADDR (((hwaddr)1 << MAX_PHYS_ADDR_SPACE_BITS) - 1)
37 #define TYPE_MEMORY_REGION "memory-region"
41 #define TYPE_IOMMU_MEMORY_REGION "iommu-memory-region"
46 #define TYPE_RAM_DISCARD_MANAGER "ram-discard-manager"
97 * @nonvolatile: this section is non-volatile
159 * should be able to take care of over-sized invalidations.
196 /* RAM is pre-allocated and passed into qemu_ram_alloc_from_ptr */
[all …]
/openbmc/linux/net/batman-adv/
H A Dmain.c1 // SPDX-License-Identifier: GPL-2.0
48 #include "distributed-arp-table.h"
51 #include "hard-interface.h"
55 #include "network-coding.h"
59 #include "soft-interface.h"
61 #include "translation-table.h"
64 * list traversals just rcu-locked
127 return -ENOMEM; in batadv_init()
145 * batadv_mesh_init() - Initialize soft interface
155 spin_lock_init(&bat_priv->forw_bat_list_lock); in batadv_mesh_init()
[all …]
/openbmc/linux/arch/powerpc/include/asm/
H A Dkvm_host.h1 /* SPDX-License-Identifier: GPL-2.0-only */
58 /* PPC-specific vcpu->requests bit members */
79 /* Physical Address Mask - allowed range of real mode RAM access */
166 /* allow access to big endian 32bit upper/lower parts and 64bit var */
182 struct rcu_head rcu; member
194 struct rcu_head rcu; member
196 u64 offset; /* in pages */ member
220 * plus forward and backward pointers in a doubly-linked ring
222 * ring are 32-bit HPTE indexes, to save space.
305 struct kvm_resize_hpt *resize_hpt; /* protected by kvm->lock */
[all …]
/openbmc/linux/drivers/net/ethernet/broadcom/bnxt/
H A Dbnxt_hwrm.c1 /* Broadcom NetXtreme-C/E network driver.
11 #include <linux/dma-mapping.h>
34 * __hwrm_req_init() - Initialize an HWRM request.
37 * @req_type: The request type. This will be converted to the little endian
50 * directly, taking care to covert such fields to little endian. The request
68 return -E2BIG; in __hwrm_req_init()
70 req_addr = dma_pool_alloc(bp->hwrm_dma_pool, GFP_KERNEL | __GFP_ZERO, in __hwrm_req_init()
73 return -ENOMEM; in __hwrm_req_init()
77 ctx->sentinel = hwrm_calc_sentinel(ctx, req_type); in __hwrm_req_init()
78 ctx->req_len = req_len; in __hwrm_req_init()
[all …]
/openbmc/qemu/migration/
H A Dram.c4 * Copyright (c) 2003-2008 Fabrice Bellard
5 * Copyright (c) 2011-2015 Red Hat Inc
34 #include "qemu/main-loop.h"
38 #include "migration-stats.h"
41 #include "qemu-file.h"
42 #include "postcopy-ram.h"
44 #include "qemu/error-report.h"
46 #include "qapi/qapi-types-migration.h"
47 #include "qapi/qapi-events-migration.h"
48 #include "qapi/qapi-commands-migration.h"
[all …]
/openbmc/linux/fs/ext4/
H A Dballoc.c1 // SPDX-License-Identifier: GPL-2.0
7 * Laboratoire MASI - Institut Blaise Pascal
11 * Big-endian to little-endian byte-swapping/bitmaps by
41 group = (block - in ext4_get_group_number()
42 le32_to_cpu(EXT4_SB(sb)->s_es->s_first_data_block)) >> in ext4_get_group_number()
50 * Calculate the block group number and offset into the block/cluster
56 struct ext4_super_block *es = EXT4_SB(sb)->s_es; in ext4_get_group_no_and_offset()
57 ext4_grpblk_t offset; in ext4_get_group_no_and_offset() local
59 blocknr = blocknr - le32_to_cpu(es->s_first_data_block); in ext4_get_group_no_and_offset()
60 offset = do_div(blocknr, EXT4_BLOCKS_PER_GROUP(sb)) >> in ext4_get_group_no_and_offset()
[all …]
/openbmc/linux/include/net/
H A Dipv6.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
34 #define NEXTHDR_HOP 0 /* Hop-by-hop option header. */
55 /* Limits on Hop-by-Hop and Destination options.
58 * Hop-by-Hop or Destination options other then the packet must fit in an MTU.
63 * - Limit the number of options in a Hop-by-Hop or Destination options
65 * - Limit the byte length of a Hop-by-Hop or Destination options extension
67 * - Disallow unknown options
77 * options or Hop-by-Hop options. If the number is less than zero then unknown
82 * Hop-by-Hop options extension header. Setting the value to INT_MAX
89 /* Default limits for Hop-by-Hop and Destination options */
[all …]
H A Dmac80211.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * mac80211 <-> driver interface
5 * Copyright 2002-2005, Devicescape Software, Inc.
6 * Copyright 2006-2007 Jiri Benc <jbenc@suse.cz>
7 * Copyright 2007-2010 Johannes Berg <johannes@sipsolutions.net>
8 * Copyright 2013-2014 Intel Mobile Communications GmbH
9 * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
10 * Copyright (C) 2018 - 2023 Intel Corporation
31 * only partial functionality in hard- or firmware. This document
32 * defines the interface between mac80211 and low-level hardware
[all …]
/openbmc/linux/fs/qnx6/
H A Dinode.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * 01-02-2012 by Kai Bankett (chaosman@ontika.net) : first release.
10 * 16-02-2012 pagemap extension by Al Viro
49 struct super_block *sb = root->d_sb; in qnx6_show_options()
52 if (sbi->s_mount_opt & QNX6_MOUNT_MMI_FS) in qnx6_show_options()
67 return fs32_to_cpu(sbi, block) + sbi->s_blks_off; in qnx6_get_devblock()
78 inode->i_ino, (unsigned long)iblock); in qnx6_get_block()
83 map_bh(bh, inode->i_sb, phys); in qnx6_get_block()
108 * returns the block number for the no-th element in the tree
113 struct super_block *s = inode->i_sb; in qnx6_block_map()
[all …]
/openbmc/qemu/hw/pci-host/
H A Dpnv_phb3.c4 * Copyright (c) 2014-2020, IBM Corporation.
7 * COPYING file in the top-level directory.
13 #include "hw/pci-host/pnv_phb3_regs.h"
14 #include "hw/pci-host/pnv_phb.h"
15 #include "hw/pci-host/pnv_phb3.h"
21 #include "hw/qdev-properties.h"
27 (phb)->chip_id, (phb)->phb_id, ## __VA_ARGS__)
31 PCIHostState *pci = PCI_HOST_BRIDGE(phb->phb_base); in pnv_phb3_find_cfg_dev()
32 uint64_t addr = phb->regs[PHB_CONFIG_ADDRESS >> 3]; in pnv_phb3_find_cfg_dev()
41 return pci_find_device(pci->bus, bus, devfn); in pnv_phb3_find_cfg_dev()
[all …]
H A Dpnv_phb4.c4 * Copyright (c) 2018-2020, IBM Corporation.
7 * COPYING file in the top-level directory.
14 #include "hw/pci-host/pnv_phb4_regs.h"
15 #include "hw/pci-host/pnv_phb4.h"
21 #include "hw/qdev-properties.h"
27 (phb)->chip_id, (phb)->phb_id, ## __VA_ARGS__)
31 (pec)->chip_id, (pec)->index, ## __VA_ARGS__)
35 PCIHostState *pci = PCI_HOST_BRIDGE(phb->phb_base); in pnv_phb4_find_cfg_dev()
36 uint64_t addr = phb->regs[PHB_CONFIG_ADDRESS >> 3]; in pnv_phb4_find_cfg_dev()
49 return pci_find_device(pci->bus, bus, devfn); in pnv_phb4_find_cfg_dev()
[all …]
/openbmc/linux/fs/nilfs2/
H A Dsuper.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2005-2008 Nippon Telegraph and Telephone Corporation.
14 * Laboratoire MASI - Institut Blaise Pascal
23 * Big-endian to little-endian byte-swapping/bitmaps by
54 MODULE_DESCRIPTION("A New Implementation of the Log-structured Filesystem "
80 KERN_SOH_ASCII, level, sb->s_id, &vaf); in __nilfs_msg()
90 struct the_nilfs *nilfs = sb->s_fs_info; in nilfs_set_error()
93 down_write(&nilfs->ns_sem); in nilfs_set_error()
94 if (!(nilfs->ns_mount_state & NILFS_ERROR_FS)) { in nilfs_set_error()
95 nilfs->ns_mount_state |= NILFS_ERROR_FS; in nilfs_set_error()
[all …]
/openbmc/linux/drivers/net/ethernet/sfc/
H A Dtc_counters.c1 // SPDX-License-Identifier: GPL-2.0-only
17 /* Counter-management hashtables */
35 WARN_ON(!list_empty(&cnt->users)); in efx_tc_counter_free()
42 flush_work(&cnt->work); in efx_tc_counter_free()
43 EFX_WARN_ON_PARANOID(spin_is_locked(&cnt->lock)); in efx_tc_counter_free()
51 WARN_ON(refcount_read(&ctr->ref)); in efx_tc_counter_id_free()
59 rc = rhashtable_init(&efx->tc->counter_id_ht, &efx_tc_counter_id_ht_params); in efx_tc_init_counters()
62 rc = rhashtable_init(&efx->tc->counter_ht, &efx_tc_counter_ht_params); in efx_tc_init_counters()
67 rhashtable_destroy(&efx->tc->counter_id_ht); in efx_tc_init_counters()
77 rhashtable_destroy(&efx->tc->counter_ht); in efx_tc_destroy_counters()
[all …]
/openbmc/linux/net/core/
H A Dfilter.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Linux Socket Filter - Kernel level socket filtering
8 * Copyright (c) 2011 - 2014 PLUMgrid, http://plumgrid.com
16 * Andi Kleen - Fix a few bad bugs and races.
17 * Kris Katterjohn - Added many additional checks in bpf_check_classic()
96 return -EINVA in copy_bpf_fprog_from_user()
215 BPF_CALL_4(bpf_skb_load_helper_8,const struct sk_buff *,skb,const void *,data,int,headlen,int,offset) BPF_CALL_4() argument
235 BPF_CALL_2(bpf_skb_load_helper_8_no_cache,const struct sk_buff *,skb,int,offset) BPF_CALL_2() argument
242 BPF_CALL_4(bpf_skb_load_helper_16,const struct sk_buff *,skb,const void *,data,int,headlen,int,offset) BPF_CALL_4() argument
262 BPF_CALL_2(bpf_skb_load_helper_16_no_cache,const struct sk_buff *,skb,int,offset) BPF_CALL_2() argument
269 BPF_CALL_4(bpf_skb_load_helper_32,const struct sk_buff *,skb,const void *,data,int,headlen,int,offset) BPF_CALL_4() argument
289 BPF_CALL_2(bpf_skb_load_helper_32_no_cache,const struct sk_buff *,skb,int,offset) BPF_CALL_2() argument
476 bool endian = BPF_SIZE(fp->code) == BPF_H || convert_bpf_ld_abs() local
481 int offset = fp->k; convert_bpf_ld_abs() local
1188 sk_filter_release_rcu(struct rcu_head * rcu) sk_filter_release_rcu() argument
1694 BPF_CALL_5(bpf_skb_store_bytes,struct sk_buff *,skb,u32,offset,const void *,from,u32,len,u64,flags) BPF_CALL_5() argument
1731 __bpf_skb_store_bytes(struct sk_buff * skb,u32 offset,const void * from,u32 len,u64 flags) __bpf_skb_store_bytes() argument
1737 BPF_CALL_4(bpf_skb_load_bytes,const struct sk_buff *,skb,u32,offset,void *,to,u32,len) BPF_CALL_4() argument
1767 __bpf_skb_load_bytes(const struct sk_buff * skb,u32 offset,void * to,u32 len) __bpf_skb_load_bytes() argument
1773 BPF_CALL_4(bpf_flow_dissector_load_bytes,const struct bpf_flow_dissector *,ctx,u32,offset,void *,to,u32,len) BPF_CALL_4() argument
1807 BPF_CALL_5(bpf_skb_load_bytes_relative,const struct sk_buff *,skb,u32,offset,void *,to,u32,len,u32,start_header) BPF_CALL_5() argument
1913 BPF_CALL_5(bpf_l3_csum_replace,struct sk_buff *,skb,u32,offset,u64,from,u64,to,u64,flags) BPF_CALL_5() argument
1957 BPF_CALL_5(bpf_l4_csum_replace,struct sk_buff *,skb,u32,offset,u64,from,u64,to,u64,flags) BPF_CALL_5() argument
2628 u32 len = 0, offset = 0, copy = 0, poffset = 0, bytes = end - start; BPF_CALL_4() local
2756 u32 new, i = 0, l = 0, space, copy = 0, offset = 0; BPF_CALL_4() local
2936 u32 i = 0, l = 0, space, offset = 0; BPF_CALL_4() local
3734 int offset = skb_network_offset(skb); __bpf_skb_min_len() local
3933 BPF_CALL_2(bpf_xdp_adjust_head,struct xdp_buff *,xdp,int,offset) BPF_CALL_2() argument
4008 bpf_xdp_pointer(struct xdp_buff * xdp,u32 offset,u32 len) bpf_xdp_pointer() argument
4040 BPF_CALL_4(bpf_xdp_load_bytes,struct xdp_buff *,xdp,u32,offset,void *,buf,u32,len) BPF_CALL_4() argument
4067 __bpf_xdp_load_bytes(struct xdp_buff * xdp,u32 offset,void * buf,u32 len) __bpf_xdp_load_bytes() argument
4072 BPF_CALL_4(bpf_xdp_store_bytes,struct xdp_buff *,xdp,u32,offset,void *,buf,u32,len) BPF_CALL_4() argument
4099 __bpf_xdp_store_bytes(struct xdp_buff * xdp,u32 offset,void * buf,u32 len) __bpf_xdp_store_bytes() argument
4104 bpf_xdp_frags_increase_tail(struct xdp_buff * xdp,int offset) bpf_xdp_frags_increase_tail() argument
4161 bpf_xdp_frags_shrink_tail(struct xdp_buff * xdp,int offset) bpf_xdp_frags_shrink_tail() argument
4193 BPF_CALL_2(bpf_xdp_adjust_tail,struct xdp_buff *,xdp,int,offset) BPF_CALL_2() argument
4229 BPF_CALL_2(bpf_xdp_adjust_meta,struct xdp_buff *,xdp,int,offset) BPF_CALL_2() argument
6437 BPF_CALL_4(bpf_lwt_seg6_store_bytes,struct sk_buff *,skb,u32,offset,const void *,from,u32,len) BPF_CALL_4() argument
6567 BPF_CALL_3(bpf_lwt_seg6_adjust_srh,struct sk_buff *,skb,u32,offset,s32,len) BPF_CALL_3() argument
11242 BPF_CALL_4(sk_reuseport_load_bytes,const struct sk_reuseport_kern *,reuse_kern,u32,offset,void *,to,u32,len) BPF_CALL_4() argument
11259 BPF_CALL_5(sk_reuseport_load_bytes_relative,const struct sk_reuseport_kern *,reuse_kern,u32,offset,void *,to,u32,len,u32,start_header) BPF_CALL_5() argument
[all...]
/openbmc/linux/fs/fat/
H A Dinode.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * Max Cohan: Fixed invalid FSINFO offset when info_sector is 0
22 #include <linux/backing-dev.h>
41 * A deserialized copy of the on-disk structure laid out in struct
123 struct super_block *sb = inode->i_sb; in __fat_get_block()
127 int err, offset; in __fat_get_block() local
140 if (iblock != MSDOS_I(inode)->mmu_private >> sb->s_blocksize_bits) { in __fat_get_block()
142 MSDOS_I(inode)->i_pos, MSDOS_I(inode)->mmu_private); in __fat_get_block()
143 return -EIO; in __fat_get_block()
146 last_block = inode->i_blocks >> (sb->s_blocksize_bits - 9); in __fat_get_block()
[all …]
/openbmc/qemu/accel/tcg/
H A Dcputlb.c21 #include "qemu/main-loop.h"
22 #include "hw/core/tcg-cpu-ops.h"
23 #include "exec/exec-all.h"
24 #include "exec/page-protection.h"
28 #include "exec/tb-flush.h"
29 #include "exec/memory-internal.h"
31 #include "exec/mmu-access-type.h"
32 #include "exec/tlb-common.h"
35 #include "qemu/error-report.h"
37 #include "exec/helper-proto-common.h"
[all …]
/openbmc/linux/fs/ext2/
H A Dsuper.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Laboratoire MASI - Institut Blaise Pascal
16 * Big-endian to little-endian byte-swapping/bitmaps by
55 struct ext2_super_block *es = sbi->s_es; in ext2_error()
58 spin_lock(&sbi->s_lock); in ext2_error()
59 sbi->s_mount_state |= EXT2_ERROR_FS; in ext2_error()
60 es->s_state |= cpu_to_le16(EXT2_ERROR_FS); in ext2_error()
61 spin_unlock(&sbi->s_lock); in ext2_error()
70 printk(KERN_CRIT "EXT2-fs (%s): error: %s: %pV\n", in ext2_error()
71 sb->s_id, function, &vaf); in ext2_error()
[all …]
/openbmc/qemu/system/
H A Dmemory.c10 * the COPYING file in the top-level directory.
12 * Contributions after 2012-01-13 are licensed under the terms of the
22 #include "qemu/error-report.h"
23 #include "qemu/main-loop.h"
24 #include "qemu/qemu-print.h"
28 #include "exec/memory-internal.h"
36 #include "exec/address-spaces.h"
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
120 if (_listener->_callback) { \
[all …]
/openbmc/linux/drivers/misc/cxl/
H A Dcxl.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
21 #include <misc/cxl-base.h>
64 /* Configuration and Control area - CAIA 1&2 */
74 /* PSL Lookaside Buffer Management Area - CAIA 1 */
83 /* PSL registers - CAIA 1 */
94 /* PSL registers - CAIA 2 */
116 /* 0x7F00:7FFF Reserved PCIe MSI-X Pending Bit Array area */
117 /* 0x8000:FFFF Reserved PCIe MSI-X Table Area */
120 /* Configuration Area - CAIA 1&2 */
127 /* Memory Management and Lookaside Buffer Management - CAIA 1*/
[all …]

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