| /openbmc/linux/tools/perf/pmu-events/arch/x86/jaketown/ |
| H A D | uncore-memory.json | 11 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM WR_CAS (w/ and w/out auto-pre)",
27 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM RD_CAS (w/ and w/out auto-pre)",
51 …"BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Read…
59 …"BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Writ…
70 "PublicDescription": "Uncore Fixed Counter - uclks",
112 …ected by a filter) on the given channel. Major modea are channel-wide, and not a per-rank (or di…
121 …ected by a filter) on the given channel. Major modea are channel-wide, and not a per-rank (or di…
130 …ected by a filter) on the given channel. Major modea are channel-wide, and not a per-rank (or di…
139 …ected by a filter) on the given channel. Major modea are channel-wide, and not a per-rank (or di…
164 …nction between the different CKE modes (APD, PPDS, PPDF). This can be determined based on the sys…
[all …]
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| /openbmc/linux/tools/perf/pmu-events/arch/x86/snowridgex/ |
| H A D | uncore-memory.json | 7 …tion": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issued on this cha…
17 …"Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-pre, on this channel.",
54 …tion": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issued on this cha…
59 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre",
63 …"PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre : DRAM RD…
99 …"Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-pre, on this channel.",
104 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/o auto-pre",
108 …"PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/o auto-pre : DRAM …
113 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/ auto-pre",
117 …"PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/ auto-pre : DRAM R…
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| /openbmc/linux/include/crypto/ |
| H A D | ecc_curve.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
10 * struct ecc_point - elliptic curve point in affine coordinates
23 * struct ecc_curve - definition of elliptic curve
28 * pre-calculated value 'mu' is appended to the @p after ndigits.
29 * Use of Barrett's reduction is heuristically determined in
45 * ecc_get_curve() - get elliptic curve;
54 * ecc_get_curve25519() - get curve25519 curve;
|
| /openbmc/linux/Documentation/devicetree/bindings/media/i2c/ |
| H A D | toshiba,et8ek8.txt | 6 Documentation/devicetree/bindings/media/video-interfaces.txt .
10 --------------------
12 - compatible: "toshiba,et8ek8"
13 - reg: I2C address (0x3e, or an alternative address)
14 - vana-supply: Analogue voltage supply (VANA), 2.8 volts
15 - clocks: External clock to the sensor
16 - clock-frequency: Frequency of the external clock to the sensor. Camera
18 a pre-determined frequency known to be suitable to the board.
19 - reset-gpios: XSHUTDOWN GPIO. The XSHUTDOWN signal is active low. The sensor
24 -------------------
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | hisilicon-femac.txt | 4 - compatible: should contain one of the following version strings:
5 * "hisilicon,hisi-femac-v1"
6 * "hisilicon,hisi-femac-v2"
7 and the soc string "hisilicon,hi3516cv300-femac".
8 - reg: specifies base physical address(s) and size of the device registers.
11 - interrupts: should contain the MAC interrupt.
12 - clocks: A phandle to the MAC main clock.
13 - resets: should contain the phandle to the MAC reset signal(required) and
15 - reset-names: should contain the reset signal name "mac"(required)
17 - phy-mode: see ethernet.txt [1].
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|
| H A D | hisilicon-hix5hd2-gmac.txt | 4 - compatible: should contain one of the following SoC strings:
5 * "hisilicon,hix5hd2-gmac"
6 * "hisilicon,hi3798cv200-gmac"
7 * "hisilicon,hi3516a-gmac"
9 * "hisilicon,hisi-gmac-v1"
10 * "hisilicon,hisi-gmac-v2"
13 - reg: specifies base physical address(s) and size of the device registers.
16 - interrupts: should contain the MAC interrupt.
17 - #address-cells: must be <1>.
18 - #size-cells: must be <0>.
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| /openbmc/linux/Documentation/devicetree/bindings/thermal/ |
| H A D | qcom-spmi-adc-tm-hc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/qcom-spmi-adc-tm-hc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
13 const: qcom,spmi-adc-tm-hc
21 "#thermal-sensor-cells":
27 "#address-cells":
30 "#size-cells":
33 qcom,avg-samples:
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|
| H A D | qcom-spmi-adc-tm5.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/qcom-spmi-adc-tm5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
14 - qcom,spmi-adc-tm5
15 - qcom,spmi-adc-tm5-gen2
16 - qcom,adc-tm7 # Incomplete / subject to change
24 "#thermal-sensor-cells":
30 "#address-cells":
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|
| /openbmc/linux/drivers/gpu/drm/i915/gt/ |
| H A D | intel_gt_mcr.h | 1 /* SPDX-License-Identifier: MIT */
50 * Helper for for_each_ss_steering loop. On pre-Xe_HP platforms, subslice
51 * presence is determined by using the group/instance as direct lookups in the
56 GRAPHICS_VER_FULL(gt_->i915) >= IP_VER(12, 50) ? \
57 intel_sseu_has_subslice(&(gt_)->info.sseu, 0, ss_) : \
58 intel_sseu_has_subslice(&(gt_)->info.sseu, group_, instance_))
|
| H A D | intel_rps_types.h | 1 /* SPDX-License-Identifier: MIT */
41 * struct intel_rps_freq_caps - rps freq capabilities
42 * @rp0_freq: non-overclocked max frequency
60 * i915->irq_lock
92 u8 efficient_freq; /* AKA RPe. Pre-determined balanced frequency */
94 u8 rp0_freq; /* Non-overclocked max frequency. */
|
| H A D | intel_wopcm.c | 1 // SPDX-License-Identifier: MIT
3 * Copyright © 2017-2019 Intel Corporation
13 * offset registers whose values are calculated and determined by HuC/GuC
26 * | Size +--------------------+
28 * | | +--------------------+
30 * | | +------------------- +
34 * | +------------------- + <== HuC Firmware Top
73 * intel_wopcm_init_early() - Early initialization of the WOPCM.
81 struct drm_i915_private *i915 = gt->i915; in intel_wopcm_init_early()
87 wopcm->size = GEN11_WOPCM_SIZE; in intel_wopcm_init_early()
[all …]
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| /openbmc/u-boot/include/configs/ |
| H A D | ti_omap5_common.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
24 * the timings to use or use pre-determined timings (based on using the
46 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
87 * the main u-boot relocation from clobbering that memory and causing a
88 * firewall violation, we tell u-boot that memory is protected RAM (PRAM)
|
| H A D | ti_omap4_common.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
27 * Total Size Environment - 128k
33 * the timings to use or use pre-determined timings (based on using the
50 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
108 "setenv fdtfile omap4-sdp.dtb; fi; " \
110 "setenv fdtfile omap4-panda.dtb; fi;" \
111 "if test $board_name = panda-a4; then " \
112 "setenv fdtfile omap4-panda-a4.dtb; fi;" \
113 "if test $board_name = panda-es; then " \
114 "setenv fdtfile omap4-panda-es.dtb; fi;" \
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| /openbmc/linux/tools/perf/pmu-events/arch/x86/ivytown/ |
| H A D | uncore-memory.json | 46 "BriefDescription": "PRE command issued by 2 cycle bypass",
48 "EventName": "UNC_M_BYP_CMDS.PRE",
54 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM WR_CAS (w/ and w/out auto-pre)",
72 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM RD_CAS (w/ and w/out auto-pre)",
115 …"BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Read…
119 … number of Opportunistic DRAM Write CAS commands issued on this channel while in Read-Major-Mode.",
124 …"BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Writ…
128 …nts the total number or DRAM Write CAS commands issued on this channel while in Write-Major-Mode.",
177 …ected by a filter) on the given channel. Major modea are channel-wide, and not a per-rank (or di…
186 …ected by a filter) on the given channel. Major modea are channel-wide, and not a per-rank (or di…
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| /openbmc/u-boot/drivers/clk/sifive/ |
| H A D | wrpll-cln28hpc.c | 1 // SPDX-License-Identifier: GPL-2.0
27 * pre-determined set of performance points.
30 * - Analog Bits "Wide Range PLL Datasheet", version 2015.10.01
31 * - SiFive FU540-C000 Manual v1p0, Chapter 7 "Clocking and Reset"
39 #include "analogbits-wrpll-cln28hpc.h"
47 /* MIN_POST_DIVIDE_REF_FREQ: minimum post-divider reference frequency, in Hz */
50 /* MAX_POST_DIVIDE_REF_FREQ: maximum post-divider reference frequency, in Hz */
79 * __wrpll_calc_filter_range() - determine PLL loop filter bandwidth
83 * on the input clock frequency after the post-R-divider @post_divr_freq.
88 * or -1 upon error.
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| /openbmc/linux/drivers/clk/analogbits/ |
| H A D | wrpll-cln28hpc.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018-2019 SiFive, Inc.
16 * pre-determined set of performance points.
19 * - Analog Bits "Wide Range PLL Datasheet", version 2015.10.01
20 * - SiFive FU540-C000 Manual v1p0, Chapter 7 "Clocking and Reset"
21 * https://static.dev.sifive.com/FU540-C000-v1.0.pdf
32 #include <linux/clk/analogbits-wrpll-cln28hpc.h>
40 /* MIN_POST_DIVIDE_REF_FREQ: minimum post-divider reference frequency, in Hz */
43 /* MAX_POST_DIVIDE_REF_FREQ: maximum post-divider reference frequency, in Hz */
72 * __wrpll_calc_filter_range() - determine PLL loop filter bandwidth
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|
| /openbmc/phosphor-mrw-tools/docs/ |
| H A D | mrw-xml-requirements.md | 5 [Serverwiz2](https://www.github.com/open-power/serverwiz). The requirements in
14 contains all FRUs (field replaceable units), along with a few non-FRU entities,
19 - Set the `FRU_NAME` attribute of that target.
31 determined, depending on the part.
50 All of the BMC chip attributes that are needed for the device tree are pre-built
61 spi-master-unit on the BMC that has its `SPI_FUNCTION` attribute set to
95 Set to the logic value required to activate the LED - either 0 or 1. The default
|
| /openbmc/linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | qcom,spmi-vadc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/qcom,spmi-vadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
15 voltage. The VADC is a 15-bit sigma-delta ADC.
17 voltage. The VADC is a 16-bit sigma-delta ADC.
22 - items:
23 - const: qcom,pms405-adc
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|
| /openbmc/linux/Documentation/input/ |
| H A D | gameport-programming.rst | 34 Please also consider enabling the gameport on the card in the ->open()
35 callback if the io is mapped to ISA space - this way it'll occupy the io
37 ->close() callback. You also can select the io address in the ->open()
70 the driver doesn't have to measure them the old way - an ADC is built into
86 return -(mode != GAMEPORT_MODE_COOKED);
94 The only confusing thing here is the fuzz value. Best determined by
97 See analog.c and input.c for handling of fuzz - the fuzz value determines
105 examples 1+2 or 1+3. Gameports can support internal calibration - see below,
107 more than one gameport instance simultaneously, use the ->private member of
147 I/O address for use with raw mode. You have to either set this, or ->read()
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|
| /openbmc/qemu/docs/system/i386/ |
| H A D | sgx.rst | 5 --------
16 -----------
23 The guest's EPC base and size are determined by QEMU, and KVM needs QEMU to
36 require -maxmem as EPC is not treated as {cold,hot}plugged memory.
43 The following QEMU snippet creates two EPC sections, with 64M pre-allocated
46 -object memory-backend-epc,id=mem1,size=64M,prealloc=on \
47 -object memory-backend-epc,id=mem2,size=28M \
48 -M sgx-epc.0.memdev=mem1,sgx-epc.1.memdev=mem2
79 in any of QEMU's built-in CPU configuration. To expose SGX (and SGX Launch
80 Control) to a guest, you must either use ``-cpu host`` to pass-through the
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|
| /openbmc/linux/arch/powerpc/platforms/pseries/ |
| H A D | io_event_irq.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2010 2011 Mark Nelson and Tseng-Hui (Frank) Lin, IBM Corporation
24 * information about hardware error and non-error events. Device
41 * if (! is_my_event(p->scope, p->event_type)) return NOTIFY_DONE;
75 /* We should only ever get called for io-event interrupts, but if in ioei_find_event()
94 return (struct pseries_io_event *) §->data; in ioei_find_event()
99 * - check-exception returns the first found error or event and clear that
101 * - Each interrupt returns one event. If a plateform chooses to report
103 * interrupt remains asserted until check-exception has been used to
104 * process all out-standing events for that interrupt.
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| /openbmc/qemu/include/hw/mem/ |
| H A D | memory-device.h | 10 * See the COPYING file in the top-level directory.
16 #include "hw/qdev-core.h"
17 #include "qapi/qapi-types-machine.h"
20 #define TYPE_MEMORY_DEVICE "memory-device"
78 * Called when plugging the memory device to configure the determined
111 * Called exactly once when pre-plugging the memory device, before
153 * the soft-limit of memslots used by memory devices to the traditional
|
| /openbmc/linux/tools/perf/pmu-events/arch/x86/icelakex/ |
| H A D | uncore-memory.json | 34 …tion": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issued on this cha…
39 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre",
43 …"PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre : DRAM RD…
79 …"Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-pre, on this channel.",
84 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/o auto-pre",
88 …"PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/o auto-pre : DRAM …
93 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/ auto-pre",
97 …"PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/ auto-pre : DRAM R…
214 "BriefDescription": "PMM Commands : Reads - RPQ",
218 … "PublicDescription": "PMM Commands : Reads - RPQ : Counts read requests issued to the PMM RPQ",
[all …]
|
| /openbmc/u-boot/doc/uImage.FIT/ |
| H A D | source_file_format.txt | 1 U-Boot new uImage source file format (bindings definition)
8 ---------------
15 replace direct passing of 'struct bd_info' which was used to boot pre-FDT
18 However, U-Boot needs to support both techniques to provide backward
21 blob. Kernel image, FDT blob and possibly ramdisk image - all must be placed
24 Additionally, old uImage format has been extended to support multi sub-images
34 --------------------------------
40 (3) increases code reuse as it is already part of the U-Boot source tree.
45 uImage internals. Bindings are defined from U-Boot perspective, i.e. describe
46 final form of the uImage at the moment when it reaches U-Boot. User
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|
| /openbmc/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
| H A D | ampdu.c | 52 #define NUM_FFPLD_FIFO 4 /* number of fifo concerned by pre-loading */
76 #define MODADD_POW2(x, y, bound) (((x) + (y)) & ((bound) - 1))
77 #define MODSUB_POW2(x, y, bound) (((x) - (y)) & ((bound) - 1))
79 /* structure to hold tx fifo information and pre-loading state
85 * ampdu_pld_size: number of bytes to be pre-loaded
86 * mcs2ampdu_table: per-mcs max # of mpdus in an ampdu
107 * ini_enable: per-tid initiator enable/disable of ampdu
112 * retry_limit_tid: per-tid mpdu transmit retry limit
113 * rr_retry_limit_tid: per-tid mpdu transmit retry limit at regular rate
114 * mpdu_density: min mpdu spacing (0-7) ==> 2^(x-1)/8 usec
[all …]
|