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/openbmc/linux/drivers/staging/sm750fb/
H A Dddk750_chip.c1 // SPDX-License-Identifier: GPL-2.0
52 * This function set up the main chip clock.
54 * Input: Frequency to be set.
56 static void set_chip_clock(unsigned int frequency) in set_chip_clock() argument
64 if (frequency) { in set_chip_clock()
66 * Set up PLL structure to hold the value to be set in clocks. in set_chip_clock()
74 * up the exact clock required by the User. in set_chip_clock()
78 sm750_calc_pll_value(frequency, &pll); in set_chip_clock()
85 static void set_memory_clock(unsigned int frequency) in set_memory_clock() argument
96 if (frequency) { in set_memory_clock()
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/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu_v13_0_4_ppsmc.h27 /*! @mainpage PMFW-PPS (PPLib) Message Interface
59 #define PPSMC_MSG_PowerDownVcn 0x06 ///< Power down VCN
60 #define PPSMC_MSG_PowerUpVcn 0x07 ///< Power up VCN; VCN is power gated by defau…
62 …MC_MSG_SetSoftMinGfxclk 0x09 ///< Set SoftMin for GFXCLK, argument is frequency in MHz
78 #define PPSMC_MSG_GetGfxclkFrequency 0x17 ///< Get GFX clock frequency
79 #define PPSMC_MSG_GetFclkFrequency 0x18 ///< Get FCLK frequency
88 #define PPSMC_MSG_SetPowerLimitPercentage 0x20 ///< Set power limit percentage
89 #define PPSMC_MSG_PowerDownJpeg 0x21 ///< Power down Jpeg
90 #define PPSMC_MSG_PowerUpJpeg 0x22 ///< Power up Jpeg; VCN is power gated by defa…
98 #define PPSMC_MSG_PowerDownIspByTile 0x29 ///< ISP is power gated by default
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/openbmc/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp-zc1751-xm015-dc1.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1
5 * (C) Copyright 2015 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/phy/phy.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
20 model = "ZynqMP zc1751-xm015-dc1 RevA";
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H A Dzynqmp-sck-kv-g-revB.dtso1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2020 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
16 /dts-v1/;
20 si5332_0: si5332-0 { /* u17 */
21 compatible = "fixed-clock";
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H A Dzynqmp-sck-kv-g-revA.dtso1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2020 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
9 * "A" - A01 board un-modified (NXP)
10 * "Y" - A01 board modified with legacy interposer (Nexperia)
11 * "Z" - A01 board modified with Diode interposer
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/net/ti-dp83867.h>
18 #include <dt-bindings/phy/phy.h>
19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
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H A Dzynqmp-zc1751-xm016-dc2.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm016-dc2
5 * (C) Copyright 2015 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
19 model = "ZynqMP zc1751-xm016-dc2 RevA";
20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
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/openbmc/linux/tools/power/cpupower/man/
H A Dcpupower-monitor.11 .TH CPUPOWER\-MONITOR "1" "22/02/2011" "" "cpupower Manual"
3 cpupower\-monitor \- Report processor frequency and idle statistics
7 .RB "\-l"
10 .RB [ -c ] [ "\-m <mon1>," [ "<mon2>,..." ] ]
11 .RB [ "\-i seconds" ]
14 .RB [ -c ][ "\-m <mon1>," [ "<mon2>,..." ] ]
18 \fBcpupower-monitor \fP reports processor topology, frequency and idle power
22 \fBcpupower-monitor \fP implements independent processor sleep state and
23 frequency counters. Some are retrieved from kernel statistics, some are
24 directly reading out hardware registers. Use \-l to get an overview which are
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/openbmc/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,adf4350.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/frequency/adi,adf4350.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
28 clock-names:
35 adi,channel-spacing:
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/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gt_pm_debugfs.c1 // SPDX-License-Identifier: MIT
29 atomic_inc(&gt->user_wakeref); in intel_gt_pm_debugfs_forcewake_user_open()
31 if (GRAPHICS_VER(gt->i915) >= 6) in intel_gt_pm_debugfs_forcewake_user_open()
32 intel_uncore_forcewake_user_get(gt->uncore); in intel_gt_pm_debugfs_forcewake_user_open()
37 if (GRAPHICS_VER(gt->i915) >= 6) in intel_gt_pm_debugfs_forcewake_user_release()
38 intel_uncore_forcewake_user_put(gt->uncore); in intel_gt_pm_debugfs_forcewake_user_release()
40 atomic_dec(&gt->user_wakeref); in intel_gt_pm_debugfs_forcewake_user_release()
45 struct intel_gt *gt = inode->i_private; in forcewake_user_open()
54 struct intel_gt *gt = inode->i_private; in forcewake_user_release()
69 struct intel_gt *gt = m->private; in fw_domains_show()
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/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8195-cherry.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>;
28 default-brightness-level = <576>;
29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
30 num-interpolated-steps = <1023>;
32 power-supply = <&ppvar_sys>;
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H A Dmt8192-asurada.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
25 stdout-path = "serial0:115200n8";
33 backlight_lcd0: backlight-lcd0 {
34 compatible = "pwm-backlight";
36 power-supply = <&ppvar_sys>;
37 enable-gpios = <&pio 152 0>;
38 brightness-levels = <0 1023>;
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H A Dmt8173-elm.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/regulator/dlg,da9211-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
25 compatible = "pwm-backlight";
27 power-supply = <&bl_fixed_reg>;
28 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&panel_backlight_en_pins>;
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/openbmc/linux/Documentation/scheduler/
H A Dsched-util-clamp.rst1 .. SPDX-License-Identifier: GPL-2.0
18 used, util clamp will influence the CPU frequency selection as well.
45 dropped. It can also dynamically 'prime' up these tasks if it knows in the
57 foreground, top-app, etc. Util clamp can be used to constrain how much
60 the ones belonging to the currently active app (top-app group). Beside this
61 helps in limiting how much power they consume. This can be more obvious in
65 1. The big cores are free to run top-app tasks immediately. top-app
68 2. They don't run on a power hungry core and drain battery even if they
82 Another use case is to help with **overcoming the ramp up latency inherit in
89 higher frequency required for the tasks to finish their work in time. Setting
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/openbmc/linux/Documentation/devicetree/bindings/net/can/
H A Dnxp,sja1000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfgang Grandegger <wg@grandegger.com>
15 - enum:
16 - nxp,sja1000
17 - technologic,sja1000
18 - items:
19 - enum:
20 - renesas,r9a06g032-sja1000 # RZ/N1D
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/openbmc/linux/Documentation/driver-api/thermal/
H A Dcpu-idle-cooling.rst1 .. SPDX-License-Identifier: GPL-2.0
8 ----------
13 act on a cooling device to mitigate the dissipated power. When the
20 to the static leakage. The only solution is to power down the
24 Last but not least, the system can ask for a specific power budget but
25 because of the OPP density, we can only choose an OPP with a power
26 budget lower than the requested one and under-utilize the CPU, thus
27 losing performance. In other words, one OPP under-utilizes the CPU
28 with a power less than the requested power budget and the next OPP
29 exceeds the power budget. An intermediate OPP could have been used if
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/openbmc/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A Duncore-power.json78 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
86 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
94 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
102 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
110 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
118 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
126 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
134 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
138 "BriefDescription": "Frequency Residency",
142 …frequency greater than or equal to the frequency that is configured in the filter. One can use al…
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/openbmc/linux/arch/riscv/boot/dts/starfive/
H A Djh7110-starfive-visionfive-2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
26 stdout-path = "serial0:115200n8";
30 timebase-frequency = <4000000>;
38 gpio-restart {
39 compatible = "gpio-restart";
46 clock-frequency = <74250000>;
50 clock-frequency = <125000000>;
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/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8060-dragonboard.dts1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
7 #include "qcom-msm8660.dtsi"
11 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660";
18 stdout-path = "serial0:115200n8";
21 /* Main power of the board: 3.7V */
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/openbmc/linux/Documentation/devicetree/bindings/timer/
H A Darm,arch_timer_mmio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marc Zyngier <marc.zyngier@arm.com>
11 - Mark Rutland <mark.rutland@arm.com>
14 ARM cores may have a memory mapped architected timer, which provides up to 8
22 - enum:
23 - arm,armv7-timer-mem
29 '#address-cells':
32 '#size-cells':
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-skov-reve-mi1010ait-1cp1.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
7 #include "imx6qdl-skov-cpu.dtsi"
11 compatible = "skov,imx6q-skov-reve-mi1010ait-1cp1", "fsl,imx6q";
14 compatible = "pwm-backlight";
15 pinctrl-names = "default";
16 pinctrl-0 = <&pinctrl_backlight>;
17 enable-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;
19 brightness-levels = <0 255>;
20 num-interpolated-steps = <17>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
25 stdout-path = "serial0:115200n8";
29 compatible = "pwm-backlight";
31 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
32 power-supply = <&ppvar_sys>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&ap_edp_bklten>;
37 /* FIXED REGULATORS - parents above children */
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H A Dsc7280-idp-ec-h1.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
11 pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
12 cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
15 compatible = "google,cros-ec-spi";
17 interrupt-parent = <&tlmm>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&ap_ec_int_l>;
21 spi-max-frequency = <3000000>;
24 compatible = "google,cros-ec-pwm";
25 #pwm-cells = <1>;
[all …]
/openbmc/linux/drivers/media/radio/si4713/
H A Dsi4713.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * drivers/media/radio/si4713-i2c.c
19 #include <media/v4l2-device.h>
20 #include <media/v4l2-ioctl.h>
21 #include <media/v4l2-common.h>
28 MODULE_PARM_DESC(debug, "Debug level (0 - 2)");
46 #define DEFAULT_ACOMP_THRESHOLD (-0x28)
55 /* frequency domain transformation (using times 10 to avoid floats) */
160 int rval = -EINVAL; in usecs_to_dev()
176 v4l2_dbg(2, debug, &sdev->sd, in si4713_handler()
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/openbmc/linux/drivers/iio/pressure/
H A Dzpa2326.c1 // SPDX-License-Identifier: GPL-2.0-only
20 * A complete one shot sampling cycle gets device out of low power mode,
22 * back to low power mode. It is meant for on demand sampling with optimal power
34 * - get device out of low power mode,
35 * - setup hardware sampling period,
36 * - at end of period, upon data ready interrupt: pop pressure samples out of
38 * - when no longer needed, stop sampling process by putting device into
39 * low power mode.
44 * Note that hardware sampling frequency is taken into account only when
70 /* 200 ms should be enough for the longest conversion time in one-shot mode. */
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/openbmc/u-boot/doc/device-tree-bindings/clock/
H A Drockchip,rk3288-dmc.txt3 - compatible: "rockchip,rk3288-dmc", "syscon"
4 - rockchip,cru: this driver should access cru regs, so need get cru here
5 - rockchip,grf: this driver should access grf regs, so need get grf here
6 - rockchip,pmu: this driver should access pmu regs, so need get pmu here
7 - rockchip,sgrf: this driver should access sgrf regs, so need get sgrf here
8 - rockchip,noc: this driver should access noc regs, so need get noc here
9 - reg: dynamic ram protocol controller(PCTL) address and phy controller(PHYCTL) address
10 - clock: must include clock specifiers corresponding to entries in the clock-names property.
11 - clock-output-names: from common clock binding to override the default output clock name
17 arm_clk: for get arm frequency
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