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/openbmc/linux/Documentation/devicetree/bindings/soc/samsung/
H A Dexynos-pmu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/soc/samsung/exynos-pmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC series Power Management Unit (PMU)
10 - Krzysztof Kozlowski <krzk@kernel.org>
12 # Custom select to avoid matching all nodes with 'syscon'
18 - samsung,exynos3250-pmu
19 - samsung,exynos4210-pmu
20 - samsung,exynos4212-pmu
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dsamsung,mipi-video-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,mipi-video-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
15 For samsung,s5pv210-mipi-video-phy compatible PHYs the second cell in the
17 0 - MIPI CSIS 0,
18 1 - MIPI DSIM 0,
[all …]
H A Dsamsung,exynos-pcie-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,exynos-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Szyprowski <m.szyprowski@samsung.com>
11 - Jaehoon Chung <jh80.chung@samsung.com>
14 "#phy-cells":
18 const: samsung,exynos5433-pcie-phy
23 samsung,pmu-syscon:
25 description: phandle for PMU system controller interface, used to
[all …]
H A Dsamsung,ufs-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,ufs-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alim Akhtar <alim.akhtar@samsung.com>
13 "#phy-cells":
18 - samsung,exynos7-ufs-phy
19 - samsung,exynosautov9-ufs-phy
20 - tesla,fsd-ufs-phy
25 reg-names:
[all …]
H A Dsamsung,usb3-drd-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,usb3-drd-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
15 For samsung,exynos5250-usbdrd-phy and samsung,exynos5420-usbdrd-phy
18 0 - UTMI+ type phy,
19 1 - PIPE3 type phy.
[all …]
H A Dsamsung,dp-video-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,dp-video-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
17 - samsung,exynos5250-dp-video-phy
18 - samsung,exynos5420-dp-video-phy
20 "#phy-cells":
[all …]
/openbmc/linux/Documentation/devicetree/bindings/perf/
H A Dapm-xgene-pmu.txt1 * APM X-Gene SoC PMU bindings
3 This is APM X-Gene SoC PMU (Performance Monitoring Unit) module.
4 The following PMU devices are supported:
6 L3C - L3 cache controller
7 IOB - IO bridge
8 MCB - Memory controller bridge
9 MC - Memory controller
11 The following section describes the SoC PMU DT node binding.
14 - compatible : Shall be "apm,xgene-pmu" for revision 1 or
15 "apm,xgene-pmu-v2" for revision 2.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/arm/rockchip/
H A Dpmu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/rockchip/pmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Power Management Unit (PMU)
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 The PMU is used to turn on and off different power domains of the SoCs.
22 - rockchip,px30-pmu
23 - rockchip,rk3066-pmu
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dsprd,sc9860-clk.txt2 ------------------------
5 - compatible: should contain the following compatible strings:
6 - "sprd,sc9860-pmu-gate"
7 - "sprd,sc9860-pll"
8 - "sprd,sc9860-ap-clk"
9 - "sprd,sc9860-aon-prediv"
10 - "sprd,sc9860-apahb-gate"
11 - "sprd,sc9860-aon-gate"
12 - "sprd,sc9860-aonsecure-clk"
13 - "sprd,sc9860-agcp-gate"
[all …]
/openbmc/linux/Documentation/devicetree/bindings/arm/amlogic/
H A Dpmu.txt1 Amlogic Meson8 and Meson8b power-management-unit:
2 -------------------------------------------------
4 The pmu is used to turn off and on different power domains of the SoCs
8 - compatible value : depending on the SoC this should be one of:
9 "amlogic,meson8-pmu"
10 "amlogic,meson8b-pmu"
11 - reg : physical base address and the size of the registers window
15 pmu@c81000e4 {
16 compatible = "amlogic,meson8b-pmu", "syscon";
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt7629.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/mt7629-clk.h>
11 #include <dt-bindings/power/mt7622-power.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/reset/mt7629-resets.h>
18 interrupt-parent = <&sysirq>;
19 #address-cells = <1>;
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drv1126.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rv1126-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rockchip,rv1126-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/realtek/
H A Drtd129x.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
5 * Copyright (c) 2016-2019 Andreas Färber
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/realtek,rtd1295.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
[all …]
H A Drtd139x.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/realtek,rtd1295.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
19 reserved-memory {
20 #address-cells = <1>;
21 #size-cells = <1>;
34 no-map;
[all …]
/openbmc/linux/arch/arm64/boot/dts/sprd/
H A Dsharkl3.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 interrupt-parent = <&gic>;
10 #address-cells = <2>;
11 #size-cells = <2>;
14 compatible = "simple-bus";
15 #address-cells = <2>;
16 #size-cells = <2>;
19 ap_ahb_regs: syscon@20e00000 {
20 compatible = "sprd,sc9863a-glbregs", "syscon",
21 "simple-mfd";
[all …]
/openbmc/linux/arch/arm/boot/dts/arm/
H A Darm-realview-pba8.dts23 /dts-v1/;
24 #include "arm-realview-pbx.dtsi"
27 model = "ARM RealView Platform Baseboard for Cortex-A8";
28 compatible = "arm,realview-pba8";
32 #address-cells = <1>;
33 #size-cells = <0>;
34 enable-method = "arm,realview-smp";
38 compatible = "arm,cortex-a8";
43 pmu: pmu@0 { label
44 compatible = "arm,cortex-a8-pmu";
[all …]
/openbmc/u-boot/doc/device-tree-bindings/pinctrl/
H A Drockchip,pinctrl.txt8 Please refer to pinctrl-bindings.txt in this directory for details of the
16 settings such as pull-up, etc.
19 defined as gpio sub-nodes of the pinmux controller.
22 - compatible: one of "rockchip,rk2928-pinctrl", "rockchip,rk3066a-pinctrl"
23 "rockchip,rk3066b-pinctrl", "rockchip,rk3188-pinctrl"
24 "rockchip,rk3288-pinctrl"
25 - rockchip,grf: phandle referencing a syscon providing the
29 - rockchip,pmu: phandle referencing a syscon providing the pmu registers
34 - reg: first element is the general register space of the iomux controller
37 Use rockchip,grf and rockchip,pmu described above instead.
[all …]
/openbmc/linux/arch/arm/boot/dts/realtek/
H A Drtd1195.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
3 * Copyright (c) 2017-2019 Andreas Färber
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/realtek,rtd1195.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a7";
[all …]
/openbmc/linux/arch/arm/boot/dts/intel/axm/
H A Daxm55xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/lsi,axm5516-clks.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
14 interrupt-parent = <&gic>;
25 compatible = "simple-bus";
26 #address-cells = <2>;
27 #size-cells = <2>;
31 compatible = "fixed-clock";
[all …]
/openbmc/u-boot/arch/x86/lib/
H A Dpmu.c1 // SPDX-License-Identifier: GPL-2.0+
8 #include <syscon.h>
10 #include <asm/pmu.h>
39 val = readl(&regs->sts); in pmu_read_status()
44 } while (--retry); in pmu_read_status()
46 printf("WARNING: PMU still busy\n"); in pmu_read_status()
47 return -EBUSY; in pmu_read_status()
57 /* Check PMU status */ in pmu_power_lss()
62 /* Read PMU values */ in pmu_power_lss()
63 ssc = readl(&regs->sss[offset]); in pmu_power_lss()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/devfreq/event/
H A Drockchip-dfi.txt5 - compatible: Must be "rockchip,rk3399-dfi".
6 - reg: physical base address of each DFI and length of memory mapped region
7 - rockchip,pmu: phandle to the syscon managing the "pmu general register files"
8 - clocks: phandles for clock specified in "clock-names" property
9 - clock-names : the name of clock used by the DFI, must be "pclk_ddr_mon";
13 compatible = "rockchip,rk3399-dfi";
15 rockchip,pmu = <&pmugrf>;
17 clock-names = "pclk_ddr_mon";
/openbmc/linux/drivers/phy/samsung/
H A Dphy-exynos-dp-video.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/mfd/syscon.h>
18 #include <linux/soc/samsung/exynos-regs-pmu.h>
33 /* Disable power isolation on DP-PHY */ in exynos_dp_video_phy_power_on()
34 return regmap_update_bits(state->regs, state->drvdata->phy_ctrl_offset, in exynos_dp_video_phy_power_on()
42 /* Enable power isolation on DP-PHY */ in exynos_dp_video_phy_power_off()
43 return regmap_update_bits(state->regs, state->drvdata->phy_ctrl_offset, in exynos_dp_video_phy_power_off()
63 .compatible = "samsung,exynos5250-dp-video-phy",
66 .compatible = "samsung,exynos5420-dp-video-phy",
76 struct device *dev = &pdev->dev; in exynos_dp_video_phy_probe()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Ddra74x.dtsi2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
18 compatible = "arm,cortex-a15";
20 operating-points-v2 = <&cpu0_opp_table>;
24 pmu {
25 compatible = "arm,cortex-a15-pmu";
26 interrupt-parent = <&wakeupgen>;
33 compatible = "syscon";
42 #address-cells = <1>;
43 #size-cells = <1>;
44 utmi-mode = <2>;
[all …]
/openbmc/linux/arch/arm/boot/dts/sigmastar/
H A Dmstar-v7.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/mstar-msc313-mpll.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
[all …]
/openbmc/linux/drivers/gpu/drm/pl111/
H A Dpl111_nomadik.c1 // SPDX-License-Identifier: GPL-2.0+
4 #include <linux/mfd/syscon.h>
21 syscon_regmap_lookup_by_compatible("stericsson,nomadik-pmu"); in pl111_nomadik_init()
26 * This bit in the PMU controller multiplexes the two graphics in pl111_nomadik_init()
34 dev_info(dev, "set Nomadik PMU mux to CLCD mode\n"); in pl111_nomadik_init()

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