Searched full:plic0 (Results 1 – 14 of 14) sorted by relevance
/openbmc/linux/arch/riscv/boot/dts/sifive/ |
H A D | fu740-c000.dtsi | 167 plic0: interrupt-controller@c000000 { label 191 interrupt-parent = <&plic0>; 199 interrupt-parent = <&plic0>; 207 interrupt-parent = <&plic0>; 219 interrupt-parent = <&plic0>; 232 interrupt-parent = <&plic0>; 243 interrupt-parent = <&plic0>; 253 interrupt-parent = <&plic0>; 262 interrupt-parent = <&plic0>; 277 interrupt-parent = <&plic0>; [all …]
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H A D | fu540-c000.dtsi | 166 plic0: interrupt-controller@c000000 { label 189 interrupt-parent = <&plic0>; 197 interrupt-parent = <&plic0>; 206 interrupt-parent = <&plic0>; 214 interrupt-parent = <&plic0>; 227 interrupt-parent = <&plic0>; 238 interrupt-parent = <&plic0>; 248 interrupt-parent = <&plic0>; 257 interrupt-parent = <&plic0>; 272 interrupt-parent = <&plic0>; [all …]
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/openbmc/u-boot/arch/riscv/dts/ |
H A D | ae350_64.dts | 52 plic0: interrupt-controller@e4000000 { label 53 compatible = "riscv,plic0"; 90 interrupt-parent = <&plic0>; 101 interrupt-parent = <&plic0>; 108 interrupt-parent = <&plic0>; 119 interrupt-parent = <&plic0>; 127 interrupt-parent = <&plic0>; 134 interrupt-parent = <&plic0>; 146 interrupt-parent = <&plic0>; 220 interrupt-parent = <&plic0>;
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H A D | ae350_32.dts | 52 plic0: interrupt-controller@e4000000 { label 53 compatible = "riscv,plic0"; 90 interrupt-parent = <&plic0>; 101 interrupt-parent = <&plic0>; 108 interrupt-parent = <&plic0>; 119 interrupt-parent = <&plic0>; 127 interrupt-parent = <&plic0>; 134 interrupt-parent = <&plic0>; 146 interrupt-parent = <&plic0>; 220 interrupt-parent = <&plic0>;
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/openbmc/linux/Documentation/devicetree/bindings/pci/ |
H A D | sifive,fu740-pcie.yaml | 108 interrupt-parent = <&plic0>; 110 interrupt-map = <0x0 0x0 0x0 0x1 &plic0 57>, 111 <0x0 0x0 0x0 0x2 &plic0 58>, 112 <0x0 0x0 0x0 0x3 &plic0 59>, 113 <0x0 0x0 0x0 0x4 &plic0 60>;
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H A D | microchip,pcie-host.yaml | 129 interrupt-parent = <&plic0>;
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/openbmc/linux/Documentation/devicetree/bindings/serial/ |
H A D | sifive-serial.yaml | 59 interrupt-parent = <&plic0>;
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/openbmc/linux/Documentation/devicetree/bindings/cache/ |
H A D | sifive,ccache0.yaml | 164 interrupt-parent = <&plic0>;
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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | sifive,plic-1.0.0.yaml | 72 - const: riscv,plic0
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/openbmc/linux/arch/riscv/boot/dts/canaan/ |
H A D | k210.dtsi | 110 interrupt-parent = <&plic0>; 124 plic0: interrupt-controller@c000000 { label
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/openbmc/u-boot/doc/ |
H A D | README.ae350 | 219 [ 0.000000] riscv,plic0,e4000000: mapped 31 interrupts to 1/2 handlers
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/openbmc/linux/drivers/irqchip/ |
H A D | irq-sifive-plic.c | 580 IRQCHIP_DECLARE(riscv_plic0, "riscv,plic0", plic_init); /* for legacy systems */
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/openbmc/qemu/hw/riscv/ |
H A D | sifive_u.c | 111 "sifive,plic-1.0.0", "riscv,plic0" in create_fdt()
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H A D | virt.c | 439 "sifive,plic-1.0.0", "riscv,plic0" in create_fdt_socket_plic()
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