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/openbmc/qemu/include/hw/dma/
H A Dpl080.h2 * ARM PrimeCell PL080/PL081 DMA controller
14 * This is a model of the Arm PrimeCell PL080/PL081 DMA controller:
15 * The PL080 TRM is:
45 #define TYPE_PL080 "pl080"
47 OBJECT_DECLARE_SIMPLE_TYPE(PL080State, PL080)
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Darm-pl08x.yaml7 title: ARM PrimeCells PL080 and PL081 and derivatives DMA controller
22 - arm,pl080
32 - arm,pl080
37 - const: arm,pl080
108 compatible = "arm,pl080", "arm,primecell";
126 compatible = "faraday,ftdma020", "arm,pl080", "arm,primecell";
H A Dlpc1850-dmamux.txt20 compatible = "nxp,lpc1850-gpdma", "arm,pl080", "arm,primecell";
/openbmc/qemu/hw/dma/
H A Dpl080.c2 * Arm PrimeCell PL080/PL081 DMA controller
15 #include "hw/dma/pl080.h"
53 .name = "pl080",
357 PL080State *s = PL080(dev); in pl080_reset()
382 PL080State *s = PL080(obj); in pl080_init()
384 memory_region_init_io(&s->iomem, OBJECT(s), &pl080_ops, s, "pl080", 0x1000); in pl080_init()
394 PL080State *s = PL080(dev); in pl080_realize()
397 error_setg(errp, "PL080 'downstream' link not set"); in pl080_realize()
401 address_space_init(&s->downstream_as, s->downstream, "pl080-downstream"); in pl080_realize()
406 PL080State *s = PL080(obj); in pl081_init()
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H A DKconfig4 config PL080 config
H A Dmeson.build2 system_ss.add(when: 'CONFIG_PL080', if_true: files('pl080.c'))
/openbmc/linux/arch/arm/mach-spear/
H A Dpl080.c3 * arch/arm/plat-spear/pl080.c
5 * DMAC pl080 definitions for SPEAr platform
19 #include "pl080.h"
H A Dpl080.h3 * arch/arm/plat-spear/include/plat/pl080.h
5 * DMAC pl080 definitions for SPEAr platform
H A DMakefile17 obj-$(CONFIG_ARCH_SPEAR3XX) += pl080.o
23 obj-$(CONFIG_ARCH_SPEAR6XX) += pl080.o
H A Dspear3xx.c14 #include <linux/amba/pl080.h>
19 #include "pl080.h"
H A Dspear6xx.c20 #include <linux/amba/pl080.h>
24 #include "pl080.h"
399 OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
H A Dspear300.c184 OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
H A Dspear310.c216 OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
H A Dspear320.c220 OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
/openbmc/linux/include/linux/amba/
H A Dpl080.h2 /* include/linux/amba/pl080.h
9 * ARM PrimeCell PL080 DMA controller
13 * make it not entierly compatible with the PL080 specification from
/openbmc/linux/drivers/dma/
H A DKconfig68 bool "ARM PrimeCell PL080 or PL081 support"
75 PL080 and PL081, Samsungs PL080 derivative and Faraday
76 Technology's FTDMAC020 PL080 derivative.
373 bool "NXP LPC18xx/43xx DMA MUX for PL080"
379 with PL080 and multiplexed DMA request lines.
H A Damba-pl08x.c10 * Documentation: ARM DDI 0196G == PL080
14 * PL080 & PL081 both have 16 sets of DMA signals that can be routed to any
17 * The PL080 has 8 channels available for simultaneous use, and the PL081
23 * The PL080 has a dual bus master, PL081 has a single master.
80 #include <linux/amba/pl080.h>
2067 dev_err(&pl08x->adev->dev, "%s no mem for pl080 sg\n", in pl08x_prep_slave_sg()
2981 /* PL080 has 8 channels and the PL080 have just 2 */
3028 /* PL080 */
3040 /* Nomadik 8815 PL080 variant */
/openbmc/qemu/hw/arm/
H A DKconfig181 select PL080 # DMA controller
271 select PL080 # DMA controller
563 select PL080 # DMA controller
/openbmc/linux/arch/arm/mach-s3c/
H A DMakefile.s3c64xx23 obj-$(CONFIG_S3C64XX_PL080) += pl080.o
H A Dpl080.c9 #include <linux/amba/pl080.h>
/openbmc/linux/arch/arm/mach-lpc32xx/
H A Dphy3250.c64 OF_DEV_AUXDATA("arm,pl080", 0x31000000, "pl08xdmac", &pl08x_pd),
/openbmc/linux/arch/arm/boot/dts/st/
H A Dspear3xx.dtsi42 compatible = "arm,pl080", "arm,primecell";
H A Dspear600.dtsi55 compatible = "arm,pl080", "arm,primecell";
H A Dste-nomadik-stn8815.dtsi856 compatible = "arm,pl080", "arm,primecell";
870 compatible = "arm,pl080", "arm,primecell";
/openbmc/linux/arch/arm/boot/dts/gemini/
H A Dgemini.dtsi412 compatible = "faraday,ftdma020", "arm,pl080", "arm,primecell";

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