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/openbmc/linux/drivers/mtd/maps/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
7 obj-$(CONFIG_MTD) += map_funcs.o
11 obj-$(CONFIG_MTD_CFI_FLAGADM) += cfi_flagadm.o
12 obj-$(CONFIG_MTD_DC21285) += dc21285.o
13 obj-$(CONFIG_MTD_L440GX) += l440gx.o
14 obj-$(CONFIG_MTD_AMD76XROM) += amd76xrom.o
15 obj-$(CONFIG_MTD_ESB2ROM) += esb2rom.o
16 obj-$(CONFIG_MTD_ICHXROM) += ichxrom.o
17 obj-$(CONFIG_MTD_CK804XROM) += ck804xrom.o
18 obj-$(CONFIG_MTD_TSUNAMI) += tsunami_flash.o
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 bool "Support non-linear mappings of flash chips"
10 paged mappings of flash chips.
13 tristate "Flash device in physical memory map"
16 This provides a 'mapping' driver which allows the NOR Flash and
19 the physical address and size of the flash chips on your
21 with config options or at run-time.
24 module will be called physmap.
27 bool "Physmap compat support"
32 physmap configuration options are done via your board's
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H A Dphysmap-gemini.c1 // SPDX-License-Identifier: GPL-2.0
3 * Cortina Systems Gemini OF physmap add-on
6 * This SoC has an elaborate flash control register, so we need to
18 #include "physmap-gemini.h"
21 * The Flash-relevant parts of the global status register
63 if (IS_ERR(gf->enabled_state)) in gemini_flash_enable_pins()
65 ret = pinctrl_select_state(gf->p, gf->enabled_state); in gemini_flash_enable_pins()
67 dev_err(gf->dev, "failed to enable pins\n"); in gemini_flash_enable_pins()
74 if (IS_ERR(gf->disabled_state)) in gemini_flash_disable_pins()
76 ret = pinctrl_select_state(gf->p, gf->disabled_state); in gemini_flash_disable_pins()
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H A Dphysmap-ixp4xx.c1 // SPDX-License-Identifier: GPL-2.0
3 * Intel IXP4xx OF physmap add-on
10 * Copyright (C) 2003-2004 MontaVista Software, Inc.
17 #include "physmap-ixp4xx.h"
20 * Read/write a 16 bit word from flash address 'addr'.
22 * When the cpu is in little-endian mode it swizzles the address lines
24 * and the like end up on the correct flash address.
27 * handles 32 bit reads, the byte stream ABCD is stored on the flash as:
29 * +---+---+
31 * +---+---+
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H A Dphysmap-core.c1 // SPDX-License-Identifier: GPL-2.0+
8 * 031022 - [jsun] add run-time configure and partition setup
14 * Revised to handle newer style flash binding by:
18 * Handle the case where a flash device is mostly addressed using physical
19 * line and supplemented by GPIOs. This way you can hook up say a 8MiB flash
23 * Copyright © 2005-2009 Analog Devices Inc.
36 #include <linux/mtd/physmap.h>
44 #include "physmap-bt1-rom.h"
45 #include "physmap-gemini.h"
46 #include "physmap-ixp4xx.h"
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H A Dphysmap-versatile.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Versatile OF physmap driver add-on
17 #include "physmap-versatile.h"
30 .compatible = "arm,integrator-ap-syscon",
34 .compatible = "arm,integrator-cp-syscon",
38 .compatible = "arm,core-module-versatile",
42 .compatible = "arm,realview-eb-syscon",
46 .compatible = "arm,realview-pb1176-syscon",
50 .compatible = "arm,realview-pb11mp-syscon",
54 .compatible = "arm,realview-pba8-syscon",
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/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Dmtd-physmap.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
10 - Rob Herring <robh@kernel.org>
13 Flash chips (Memory Technology Devices) are often used for solid state
17 - $ref: mtd.yaml#
18 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
23 - items:
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/openbmc/u-boot/doc/device-tree-bindings/mtd/
H A Dmtd-physmap.txt1 CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
3 Flash chips (Memory Technology Devices) are often used for solid state
6 - compatible : should contain the specific model of mtd chip(s)
7 used, if known, followed by either "cfi-flash", "jedec-flash",
8 "mtd-ram" or "mtd-rom".
9 - reg : Address range(s) of the mtd chip(s)
11 non-identical chips can be described in one node.
12 - bank-width : Width (in bytes) of the bank. Equal to the
14 - device-width : (optional) Width of a single mtd chip. If
15 omitted, assumed to be equal to 'bank-width'.
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/openbmc/u-boot/configs/
H A Dwoodburn_defconfig9 CONFIG_SYS_PROMPT="woodburn U-Boot > "
24 CONFIG_MTDIDS_DEFAULT="nand0=mxc_nand,nor0=physmap-flash.0"
25 …nand:50m(root1),32m(rootfb),64m(pcache),64m(app1),10m(app2),-(spool);physmap-flash.0:512k(u-boot),…
H A Dflea3_defconfig11 CONFIG_SYS_PROMPT="flea3 U-Boot > "
21 CONFIG_MTDIDS_DEFAULT="nand0=mxc_nand,nor0=physmap-flash.0"
22 …nand:50m(root1),32m(rootfb),64m(pcache),64m(app1),10m(app2),-(spool);physmap-flash.0:512k(u-boot),…
H A Dmx35pdk_defconfig23 CONFIG_MTDIDS_DEFAULT="nand0=mxc_nand,nor0=physmap-flash.0"
24 …T="mtdparts=mxc_nand:1m(boot),5m(linux),96m(root),8m(cfg),1938m(user);physmap-flash.0:512k(b),4m(k…
H A Dpm9263_defconfig15 CONFIG_SYS_PROMPT="u-boot-pm9263> "
27 CONFIG_MTDIDS_DEFAULT="nor0=physmap-flash.0,nand0=nand"
28 CONFIG_MTDPARTS_DEFAULT="mtdparts=physmap-flash.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),-(…
H A Dpm9261_defconfig27 CONFIG_MTDIDS_DEFAULT="nor0=physmap-flash.0,nand0=nand"
28 CONFIG_MTDPARTS_DEFAULT="mtdparts=physmap-flash.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),-(…
H A Dwoodburn_sd_defconfig19 CONFIG_SYS_PROMPT="woodburn U-Boot > "
34 CONFIG_MTDIDS_DEFAULT="nand0=mxc_nand,nor0=physmap-flash.0"
35 …nand:50m(root1),32m(rootfb),64m(pcache),64m(app1),10m(app2),-(spool);physmap-flash.0:512k(u-boot),…
H A Domap3_logic_somlv_defconfig16 CONFIG_DEFAULT_FDT_FILE="logicpd-som-lv-37xx-devkit.dtb"
33 CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0,nor0=physmap-flash.0"
34 …ARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1792k(u-boot),128k(spl-os),128k(u-boot-env),6m(kerne…
38 CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-37xx-devkit"
H A Domap35_logic_somlv_defconfig16 CONFIG_DEFAULT_FDT_FILE="logicpd-som-lv-35xx-devkit.dtb"
33 CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0,nor0=physmap-flash.0"
34 …ARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1792k(u-boot),128k(spl-os),128k(u-boot-env),6m(kerne…
38 CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-35xx-devkit"
/openbmc/linux/drivers/bcma/
H A Ddriver_chipcommon_pflash.c3 * ChipCommon parallel flash
11 #include <linux/mtd/physmap.h>
26 .name = "physmap-flash",
36 struct bcma_pflash *pflash = &cc->pflash; in bcma_pflash_init()
38 pflash->present = true; in bcma_pflash_init()
40 if (!(bcma_read32(cc->core, BCMA_CC_FLASH_CFG) & BCMA_CC_FLASH_CFG_DS)) in bcma_pflash_init()
/openbmc/linux/arch/mips/bcm63xx/
H A Ddev-flash.c2 * Broadcom BCM63xx flash registration
18 #include <linux/mtd/physmap.h>
50 .name = "physmap-flash",
99 return -EINVAL; in bcm63xx_detect_flash_type()
121 pr_warn("unsupported serial flash detected\n"); in bcm63xx_flash_register()
122 return -ENODEV; in bcm63xx_flash_register()
124 pr_warn("unsupported NAND flash detected\n"); in bcm63xx_flash_register()
125 return -ENODEV; in bcm63xx_flash_register()
127 pr_err("flash detection failed for BCM%x: %d\n", in bcm63xx_flash_register()
129 return -ENODEV; in bcm63xx_flash_register()
/openbmc/linux/arch/sh/boards/
H A Dboard-espt.c1 // SPDX-License-Identifier: GPL-2.0
3 * Data Technology Inc. ESPT-GIGA board support
11 #include <linux/mtd/physmap.h>
18 /* NOR Flash */
21 .name = "U-Boot",
24 .mask_flags = MTD_WRITEABLE, /* Read-only */
26 .name = "Linux-Kernel",
44 .name = "NOR Flash",
46 .end = SZ_8M - 1,
52 .name = "physmap-flash",
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H A Dboard-urquell.c1 // SPDX-License-Identifier: GPL-2.0
8 * Based on board-sh7785lcr.c
15 #include <linux/mtd/physmap.h>
25 #include <asm/smp-ops.h>
29 *----------------------------
30 * SW1 0101 0010 -> Pck 33MHz version
32 * SW2 0x1x xxxx -> little endian
34 * SW47 0001 1000 -> CS0 : on-board flash
39 * 0x00000000 - 0x04000000 (CS0) Nor Flash
40 * 0x04000000 - 0x04200000 (CS1) SRAM
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H A Dboard-edosk7760.c1 // SPDX-License-Identifier: GPL-2.0+
15 #include <linux/mtd/physmap.h>
20 #include <asm/i2c-sh7760.h>
31 /* NOR flash */
37 .mask_flags = MTD_WRITEABLE, /* Read-only */
61 .name = "NOR Flash",
63 .end = 0x00000000 + SZ_32M - 1,
69 .name = "physmap-flash",
135 .end = SMC_IOADDR + SZ_32 - 1,
147 .id = -1,
/openbmc/linux/arch/m68k/coldfire/
H A Dfirebee.c1 // SPDX-License-Identifier: GPL-2.0
5 * firebee.c -- extra startup code support for the FireBee boards
18 #include <linux/mtd/physmap.h>
25 * 8MB of NOR flash fitted to the FireBee board.
27 #define FLASH_PHYS_ADDR 0xe0000000 /* Physical address of flash */
28 #define FLASH_PHYS_SIZE 0x00800000 /* Size of flash */
30 #define PART_BOOT_START 0x00000000 /* Start at bottom of flash */
33 #define PART_IMAGE_SIZE 0x006c0000 /* Most of flash */
68 .name = "physmap-flash",
H A Damcore.c2 * amcore.c -- Support for Sysam AMCORE open board
19 #include <linux/mtd/physmap.h>
75 /* Set the dm9000 interrupt to be auto-vectored */ in dm9000_pre_init()
80 * Partitioning of parallel NOR flash (39VF3201B)
84 .name = "U-Boot (128K)",
94 .name = "Flash Free Space (1024K)",
113 .name = "physmap-flash",
114 .id = -1,
123 .name = "rtc-ds1307",
124 .id = -1,
/openbmc/linux/arch/mips/cobalt/
H A Dmtd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2006 Yoichi Yuasa <yuasa@linux-mips.org>
10 #include <linux/mtd/physmap.h>
33 .name = "physmap-flash",
/openbmc/u-boot/board/freescale/m54455evb/
H A DREADME4 TsiChung Liew(Tsi-Chung.Liew@freescale.com)
12 - board/freescale/m54455evb/m54455evb.c Dram setup, IDE pre init, and PCI init
13 - board/freescale/m54455evb/flash.c Atmel and INTEL flash support
14 - board/freescale/m54455evb/Makefile Makefile
15 - board/freescale/m54455evb/config.mk config make
16 - board/freescale/m54455evb/u-boot.lds Linker description
18 - common/cmd_bdinfo.c Clock frequencies output
19 - common/cmd_mii.c mii support
21 - arch/m68k/cpu/mcf5445x/cpu.c cpu specific code
22 - arch/m68k/cpu/mcf5445x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs
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