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/openbmc/linux/drivers/staging/iio/frequency/
H A Dad9832.h20 * @phase1: power up phase1 value [0..4095] correlates with 0..2PI
29 unsigned short phase1; member
H A Dad9832.c432 ret = ad9832_write_phase(st, AD9832_PHASE1H, pdata->phase1); in ad9832_probe()
/openbmc/linux/Documentation/devicetree/bindings/watchdog/
H A Drealtek,otto-wdt.yaml47 - const: phase1
86 interrupt-names = "phase1", "phase2";
/openbmc/linux/drivers/watchdog/
H A Drealtek_otto_wdt.c12 * - Phase 1: Times out after (PHASE1 + 1) × PRESCALE × T_0
113 * The timer asserts the PHASE1/PHASE2 IRQs when the number of ticks exceeds
314 ctrl->irq_phase1 = platform_get_irq_byname(pdev, "phase1"); in otto_wdt_probe()
321 return dev_err_probe(dev, ret, "Failed to get IRQ for phase1\n"); in otto_wdt_probe()
/openbmc/fb-ipmi-oem/configs/minerva/
H A Dpost_desc.json2 "Phase1": [["0x00", ""]] array
/openbmc/fb-ipmi-oem/configs/harma/
H A Dpost_desc.json2 "Phase1": [["0x00", ""]] array
/openbmc/fb-ipmi-oem/configs/bletchley/
H A Dpost_desc.json2 "Phase1": [["0x00", ""]] array
/openbmc/fb-ipmi-oem/configs/catalina/
H A Dpost_desc.json2 "Phase1": [["0x00", ""]] array
/openbmc/openbmc/poky/meta/recipes-connectivity/wpa-supplicant/wpa-supplicant/
H A Dwpa_supplicant.conf347 # phase1: Phase1 (outer authentication, i.e., TLS tunnel) parameters
415 # phase1: fast_provisioning=1 option enables in-line provisioning of EAP-FAST
479 phase1="peaplabel=1"
516 # Phase1 / outer authentication
633 phase1="peaplabel=0"
/openbmc/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_mbx.h48 ixgbe_mbox_api_20, /* API version 2.0, solaris Phase1 VF driver */
/openbmc/linux/drivers/net/ethernet/intel/ixgbevf/
H A Dmbx.h63 ixgbe_mbox_api_20, /* API version 2.0, solaris Phase1 VF driver */
/openbmc/fb-ipmi-oem/configs/tiogapass/
H A Dpost_desc.json2 "Phase1": [ array
/openbmc/fb-ipmi-oem/configs/yosemitev2/
H A Dpost_desc.json2 "Phase1": [ array
/openbmc/fb-ipmi-oem/configs/greatlakes/
H A Dpost_desc.json2 "Phase1": [ array
/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_hw_training.h126 * Invertion limit and phase1 limit are WA for the RL @ 1:1 design bug -
/openbmc/linux/drivers/staging/rtl8712/
H A Drtl871x_security.c381 #define P1K_SIZE 10 /* 80-bit Phase1 key */
473 static void phase1(u16 *p1k, const u8 *tk, const u8 *ta, u32 iv32) in phase1() function
507 * The value {TA,IV32,IV16} for Phase1/Phase2 must be unique
596 phase1((u16 *)&ttkey[0], prwskey, in r8712_tkip_encrypt()
679 phase1((u16 *)&ttkey[0], prwskey, &prxattrib->ta[0], in r8712_tkip_decrypt()
/openbmc/linux/drivers/hwmon/
H A Dabituguru3.c494 { "PWM Phase1", 26, 1, 1, 1, 0 },
521 { "PWM Phase1", 26, 1, 1, 1, 0 },
576 { "PWM Phase1", 26, 1, 1, 1, 0 },
603 { "PWM Phase1", 26, 1, 1, 1, 0 },
/openbmc/linux/drivers/staging/rtl8723bs/core/
H A Drtw_security.c363 static void phase1(u16 *p1k, const u8 *tk, const u8 *ta, u32 iv32) in phase1() function
400 * The value {TA, IV32, IV16} for Phase1/Phase2 must be unique
503 phase1((u16 *)&ttkey[0], prwskey, &pattrib->ta[0], pnh); in rtw_tkip_encrypt()
613 phase1((u16 *)&ttkey[0], prwskey, &prxattrib->ta[0], pnh); in rtw_tkip_decrypt()
/openbmc/linux/net/mac80211/
H A Dtkip.c76 * P1K := Phase1(TA, TK, TSC)
/openbmc/linux/drivers/net/hippi/
H A Drrunner.h688 struct phase1_hdr phase1; member
/openbmc/linux/drivers/gpu/drm/arm/display/komeda/d71/
H A Dd71_dev.c426 * Phase1: Disabling components with display is on to make sure in d71_enum_resources()
/openbmc/linux/drivers/staging/rtl8192u/ieee80211/
H A Dieee80211_crypt_tkip.c415 * Previously cached Phase1 result was already in ieee80211_tkip_decrypt()
/openbmc/linux/drivers/staging/rtl8192e/
H A Drtllib_crypt_tkip.c409 /* Previously cached Phase1 result was already in rtllib_tkip_decrypt()
/openbmc/linux/Documentation/networking/device_drivers/can/ctu/
H A Dctucanfd-driver.rst286 On CAN, each bit is divided into four segments: SYNC, PROP, PHASE1, and
/openbmc/linux/net/wireless/
H A Dlib80211_crypt_tkip.c449 /* Previously cached Phase1 result was already lost, so in lib80211_tkip_decrypt()

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