| /openbmc/linux/drivers/pinctrl/ |
| H A D | pinctrl-single.c | 209 #define PCS_QUIRK_HAS_SHARED_IRQ (pcs->flags & PCS_QUIRK_SHARED_IRQ)
210 #define PCS_HAS_IRQ (pcs->flags & PCS_FEAT_IRQ)
211 #define PCS_HAS_PINCONF (pcs->flags & PCS_FEAT_PINCONF)
272 static unsigned int pcs_pin_reg_offset_get(struct pcs_device *pcs, in pcs_pin_reg_offset_get() argument
275 unsigned int mux_bytes = pcs->width / BITS_PER_BYTE; in pcs_pin_reg_offset_get()
277 if (pcs->bits_per_mux) { in pcs_pin_reg_offset_get()
280 pin_offset_bytes = (pcs->bits_per_pin * pin) / BITS_PER_BYTE; in pcs_pin_reg_offset_get()
287 static unsigned int pcs_pin_shift_reg_get(struct pcs_device *pcs, in pcs_pin_shift_reg_get() argument
290 return (pin % (pcs->width / pcs->bits_per_pin)) * pcs->bits_per_pin; in pcs_pin_shift_reg_get()
297 struct pcs_device *pcs; in pcs_pin_dbg_show() local
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| /openbmc/linux/drivers/net/pcs/ |
| H A D | pcs-lynx.c | 3 * Lynx PCS MDIO helpers
8 #include <linux/pcs-lynx.h>
11 #define SGMII_CLOCK_PERIOD_NS 8 /* PCS is clocked at 125 MHz */
24 struct phylink_pcs pcs; member
35 #define phylink_pcs_to_lynx(pl_pcs) container_of((pl_pcs), struct lynx_pcs, pcs)
36 #define lynx_to_phylink_pcs(lynx) (&(lynx)->pcs)
38 static void lynx_pcs_get_state_usxgmii(struct mdio_device *pcs, in lynx_pcs_get_state_usxgmii() argument
41 struct mii_bus *bus = pcs->bus; in lynx_pcs_get_state_usxgmii()
42 int addr = pcs->addr; in lynx_pcs_get_state_usxgmii()
61 static void lynx_pcs_get_state_2500basex(struct mdio_device *pcs, in lynx_pcs_get_state_2500basex() argument
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| H A D | pcs-mtk-lynxi.c | 13 #include <linux/pcs/pcs-mtk-lynxi.h>
72 * @dev: Pointer to device owning the PCS
75 * @pcs: Phylink PCS structure
82 struct phylink_pcs pcs; member
86 static struct mtk_pcs_lynxi *pcs_to_mtk_pcs_lynxi(struct phylink_pcs *pcs) in pcs_to_mtk_pcs_lynxi() argument
88 return container_of(pcs, struct mtk_pcs_lynxi, pcs); in pcs_to_mtk_pcs_lynxi()
91 static void mtk_pcs_lynxi_get_state(struct phylink_pcs *pcs, in mtk_pcs_lynxi_get_state() argument
94 struct mtk_pcs_lynxi *mpcs = pcs_to_mtk_pcs_lynxi(pcs); in mtk_pcs_lynxi_get_state()
105 static int mtk_pcs_lynxi_config(struct phylink_pcs *pcs, unsigned int neg_mode, in mtk_pcs_lynxi_config() argument
110 struct mtk_pcs_lynxi *mpcs = pcs_to_mtk_pcs_lynxi(pcs); in mtk_pcs_lynxi_config()
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| H A D | Makefile | 2 # Makefile for Linux PCS drivers
4 pcs_xpcs-$(CONFIG_PCS_XPCS) := pcs-xpcs.o pcs-xpcs-nxp.o pcs-xpcs-wx.o
7 obj-$(CONFIG_PCS_LYNX) += pcs-lynx.o
8 obj-$(CONFIG_PCS_MTK_LYNXI) += pcs-mtk-lynxi.o
9 obj-$(CONFIG_PCS_RZN1_MIIC) += pcs-rzn1-miic.o
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| H A D | pcs-rzn1-miic.c | 13 #include <linux/pcs-rzn1-miic.h>
17 #include <dt-bindings/net/pcs-rzn1-miic.h>
136 * @pcs: PCS structure associated to the port
142 struct phylink_pcs pcs; member
147 static struct miic_port *phylink_pcs_to_miic_port(struct phylink_pcs *pcs) in phylink_pcs_to_miic_port() argument
149 return container_of(pcs, struct miic_port, pcs); in phylink_pcs_to_miic_port()
186 static int miic_config(struct phylink_pcs *pcs, unsigned int mode, in miic_config() argument
190 struct miic_port *miic_port = phylink_pcs_to_miic_port(pcs); in miic_config()
237 static void miic_link_up(struct phylink_pcs *pcs, unsigned int mode, in miic_link_up() argument
240 struct miic_port *miic_port = phylink_pcs_to_miic_port(pcs); in miic_link_up()
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| H A D | Kconfig | 3 # PCS Layer Configuration
6 menu "PCS device drivers"
18 This module provides helpers to phylink for managing the Lynx PCS
25 This module provides helpers to phylink for managing the LynxI PCS
33 on RZ/N1 SoCs. This PCS converts MII to RMII/RGMII or can be set in
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| /openbmc/linux/drivers/net/dsa/b53/ |
| H A D | b53_serdes.c | 20 static inline struct b53_pcs *pcs_to_b53_pcs(struct phylink_pcs *pcs) in pcs_to_b53_pcs() argument
22 return container_of(pcs, struct b53_pcs, pcs); in pcs_to_b53_pcs()
68 static int b53_serdes_config(struct phylink_pcs *pcs, unsigned int neg_mode, in b53_serdes_config() argument
73 struct b53_device *dev = pcs_to_b53_pcs(pcs)->dev; in b53_serdes_config()
74 u8 lane = pcs_to_b53_pcs(pcs)->lane; in b53_serdes_config()
89 static void b53_serdes_an_restart(struct phylink_pcs *pcs) in b53_serdes_an_restart() argument
91 struct b53_device *dev = pcs_to_b53_pcs(pcs)->dev; in b53_serdes_an_restart()
92 u8 lane = pcs_to_b53_pcs(pcs)->lane; in b53_serdes_an_restart()
102 static void b53_serdes_get_state(struct phylink_pcs *pcs, in b53_serdes_get_state() argument
105 struct b53_device *dev = pcs_to_b53_pcs(pcs)->dev; in b53_serdes_get_state()
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| /openbmc/linux/include/linux/ |
| H A D | phylink.h | 25 /* PCS "negotiation" mode.
102 * phylink_pcs_neg_mode() - helper to determine PCS inband mode
107 * Determines the negotiation mode to be used by the PCS, and returns
117 * Note: this is for cases where the PCS itself is involved in negotiation
207 * @ovr_an_inband: if true, override PCS to MLO_AN_INBAND
211 * are supported by the MAC/PCS.
231 * @mac_select_pcs: Select a PCS for the interface mode.
296 * mac_select_pcs: Select a PCS for the interface mode.
298 * @interface: PHY interface mode for PCS
303 * This must not modify any state. It is used to query which PCS should
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_xgmi.c | 107 {"XGMI PCS DataLossErr",
109 {"XGMI PCS TrainingErr",
111 {"XGMI PCS CRCErr",
113 {"XGMI PCS BERExceededErr",
115 {"XGMI PCS TxMetaDataErr",
117 {"XGMI PCS ReplayBufParityErr",
119 {"XGMI PCS DataParityErr",
121 {"XGMI PCS ReplayFifoOverflowErr",
123 {"XGMI PCS ReplayFifoUnderflowErr",
125 {"XGMI PCS ElasticFifoOverflowErr",
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| /openbmc/linux/drivers/net/dsa/mv88e6xxx/ |
| H A D | pcs-639x.c | 3 * Marvell 88E6352 family SERDES PCS support
129 static struct mv88e639x_pcs *sgmii_pcs_to_mv88e639x_pcs(struct phylink_pcs *pcs) in sgmii_pcs_to_mv88e639x_pcs() argument
131 return container_of(pcs, struct mv88e639x_pcs, sgmii_pcs); in sgmii_pcs_to_mv88e639x_pcs()
183 static int mv88e639x_sgmii_pcs_enable(struct phylink_pcs *pcs) in mv88e639x_sgmii_pcs_enable() argument
185 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs); in mv88e639x_sgmii_pcs_enable()
193 static void mv88e639x_sgmii_pcs_disable(struct phylink_pcs *pcs) in mv88e639x_sgmii_pcs_disable() argument
195 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs); in mv88e639x_sgmii_pcs_disable()
201 static void mv88e639x_sgmii_pcs_pre_config(struct phylink_pcs *pcs, in mv88e639x_sgmii_pcs_pre_config() argument
204 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs); in mv88e639x_sgmii_pcs_pre_config()
240 static int mv88e639x_sgmii_pcs_post_config(struct phylink_pcs *pcs, in mv88e639x_sgmii_pcs_post_config() argument
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| H A D | pcs-6352.c | 3 * Marvell 88E6352 family SERDES PCS support
33 static struct marvell_c22_pcs *pcs_to_marvell_c22_pcs(struct phylink_pcs *pcs) in pcs_to_marvell_c22_pcs() argument
35 return container_of(pcs, struct marvell_c22_pcs, phylink_pcs); in pcs_to_marvell_c22_pcs()
140 static int marvell_c22_pcs_enable(struct phylink_pcs *pcs) in marvell_c22_pcs_enable() argument
142 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs); in marvell_c22_pcs_enable()
152 static void marvell_c22_pcs_disable(struct phylink_pcs *pcs) in marvell_c22_pcs_disable() argument
154 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs); in marvell_c22_pcs_disable()
160 static void marvell_c22_pcs_get_state(struct phylink_pcs *pcs, in marvell_c22_pcs_get_state() argument
163 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs); in marvell_c22_pcs_get_state()
184 static int marvell_c22_pcs_config(struct phylink_pcs *pcs, in marvell_c22_pcs_config() argument
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| H A D | pcs-6185.c | 3 * Marvell 88E6185 family SERDES PCS support
24 static struct mv88e6185_pcs *pcs_to_mv88e6185_pcs(struct phylink_pcs *pcs) in pcs_to_mv88e6185_pcs() argument
26 return container_of(pcs, struct mv88e6185_pcs, phylink_pcs); in pcs_to_mv88e6185_pcs()
57 static void mv88e6185_pcs_get_state(struct phylink_pcs *pcs, in mv88e6185_pcs_get_state() argument
60 struct mv88e6185_pcs *mpcs = pcs_to_mv88e6185_pcs(pcs); in mv88e6185_pcs_get_state()
98 static int mv88e6185_pcs_config(struct phylink_pcs *pcs, unsigned int mode, in mv88e6185_pcs_config() argument
106 static void mv88e6185_pcs_an_restart(struct phylink_pcs *pcs) in mv88e6185_pcs_an_restart() argument
125 * have a PCS or not. in mv88e6185_pcs_init()
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| /openbmc/linux/arch/arm64/boot/dts/freescale/ |
| H A D | fsl-ls1043-post.dtsi | 27 pcs-handle-names = "qsgmii";
32 pcs-handle-names = "sgmii", "qsgmii";
43 pcs-handle-names = "sgmii", "qsgmii";
48 pcs-handle-names = "sgmii", "qsgmii";
55 qsgmiib_pcs1: ethernet-pcs@1 {
56 compatible = "fsl,lynx-pcs";
60 qsgmiib_pcs2: ethernet-pcs@2 {
61 compatible = "fsl,lynx-pcs";
65 qsgmiib_pcs3: ethernet-pcs@3 {
66 compatible = "fsl,lynx-pcs";
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| H A D | fsl-ls1046-post.dtsi | 27 pcs-handle-names = "qsgmii";
41 pcs-handle-names = "sgmii", "qsgmii";
46 pcs-handle-names = "sgmii", "qsgmii";
54 pcs-handle-names = "sgmii", "qsgmii", "xfi";
58 qsgmiib_pcs1: ethernet-pcs@1 {
59 compatible = "fsl,lynx-pcs";
63 qsgmiib_pcs2: ethernet-pcs@2 {
64 compatible = "fsl,lynx-pcs";
68 qsgmiib_pcs3: ethernet-pcs@3 {
69 compatible = "fsl,lynx-pcs";
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| H A D | fsl-ls1088a-rdb.dts | 23 pcs-handle = <&pcs2>;
30 pcs-handle = <&pcs3_0>;
37 pcs-handle = <&pcs3_1>;
44 pcs-handle = <&pcs3_2>;
51 pcs-handle = <&pcs3_3>;
58 pcs-handle = <&pcs7_0>;
65 pcs-handle = <&pcs7_1>;
72 pcs-handle = <&pcs7_2>;
79 pcs-handle = <&pcs7_3>;
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | nvidia,tegra234-mgbe.yaml | 49 - const: eee-pcs
50 - const: rx-pcs-input
51 - const: rx-pcs-m
52 - const: rx-pcs
53 - const: tx-pcs
61 - const: pcs
137 "rx-input", "tx", "eee-pcs", "rx-pcs-input", "rx-pcs-m",
138 "rx-pcs", "tx-pcs";
141 reset-names = "mac", "pcs";
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| H A D | fsl,fman-dtsec.yaml | 101 description: See pcs-handle.
103 pcs-handle:
108 pcs-handle-names is absent, and phy-connection-type is "xgmii", then the first
109 reference will be assumed to be for "xfi". Otherwise, if pcs-handle-names is
112 pcs-handle-names:
120 description: The type of each PCS in pcsphy-handle.
124 description: A reference to the (TBI-based) PCS
134 pcs-handle-names:
135 - pcs-handle
167 pcs-handle = <&pcsphy4>, <&qsgmiib_pcs1>;
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| /openbmc/linux/Documentation/devicetree/bindings/net/pcs/ |
| H A D | fsl,lynx-pcs.yaml | 4 $id: http://devicetree.org/schemas/net/pcs/fsl,lynx-pcs.yaml#
7 title: NXP Lynx PCS
13 NXP Lynx 10G and 28G SerDes have Ethernet PCS devices which can be used as
19 const: fsl,lynx-pcs
36 qsgmii_pcs1: ethernet-pcs@1 {
37 compatible = "fsl,lynx-pcs";
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| /openbmc/linux/drivers/net/phy/ |
| H A D | phylink.c | 51 struct phylink_pcs *pcs; member
660 struct phylink_pcs *pcs; in phylink_validate_mac_and_pcs() local
663 /* Get the PCS for this interface mode */ in phylink_validate_mac_and_pcs()
665 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); in phylink_validate_mac_and_pcs()
666 if (IS_ERR(pcs)) in phylink_validate_mac_and_pcs()
667 return PTR_ERR(pcs); in phylink_validate_mac_and_pcs()
669 pcs = pl->pcs; in phylink_validate_mac_and_pcs()
672 if (pcs) { in phylink_validate_mac_and_pcs()
673 /* The PCS, if present, must be setup before phylink_create() in phylink_validate_mac_and_pcs()
677 if (!pcs->ops) { in phylink_validate_mac_and_pcs()
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| /openbmc/linux/drivers/net/ethernet/microchip/lan966x/ |
| H A D | lan966x_phylink.c | 77 /* Take PCS out of reset */ in lan966x_phylink_mac_link_down()
85 static struct lan966x_port *lan966x_pcs_to_port(struct phylink_pcs *pcs) in lan966x_pcs_to_port() argument
87 return container_of(pcs, struct lan966x_port, phylink_pcs); in lan966x_pcs_to_port()
90 static void lan966x_pcs_get_state(struct phylink_pcs *pcs, in lan966x_pcs_get_state() argument
93 struct lan966x_port *port = lan966x_pcs_to_port(pcs); in lan966x_pcs_get_state()
98 static int lan966x_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, in lan966x_pcs_config() argument
103 struct lan966x_port *port = lan966x_pcs_to_port(pcs); in lan966x_pcs_config()
115 netdev_err(port->dev, "port PCS config failed: %d\n", ret); in lan966x_pcs_config()
120 static void lan966x_pcs_aneg_restart(struct phylink_pcs *pcs) in lan966x_pcs_aneg_restart() argument
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| /openbmc/linux/drivers/net/ethernet/microchip/sparx5/ |
| H A D | sparx5_phylink.c | 75 static struct sparx5_port *sparx5_pcs_to_port(struct phylink_pcs *pcs) in sparx5_pcs_to_port() argument
77 return container_of(pcs, struct sparx5_port, phylink_pcs); in sparx5_pcs_to_port()
80 static void sparx5_pcs_get_state(struct phylink_pcs *pcs, in sparx5_pcs_get_state() argument
83 struct sparx5_port *port = sparx5_pcs_to_port(pcs); in sparx5_pcs_get_state()
94 static int sparx5_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, in sparx5_pcs_config() argument
99 struct sparx5_port *port = sparx5_pcs_to_port(pcs); in sparx5_pcs_config()
122 /* Enable the PCS matching this interface type */ in sparx5_pcs_config()
125 netdev_err(port->ndev, "port PCS config failed: %d\n", ret); in sparx5_pcs_config()
129 static void sparx5_pcs_aneg_restart(struct phylink_pcs *pcs) in sparx5_pcs_aneg_restart() argument
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| /openbmc/linux/drivers/net/ethernet/freescale/dpaa2/ |
| H A D | dpaa2-mac.c | 5 #include <linux/pcs-lynx.h>
157 return mac->pcs; in dpaa2_mac_select_pcs()
256 struct phylink_pcs *pcs; in dpaa2_pcs_create() local
258 node = fwnode_find_reference(dpmac_node, "pcs-handle", 0); in dpaa2_pcs_create()
261 netdev_warn(mac->net_dev, "pcs-handle node not found\n"); in dpaa2_pcs_create()
265 pcs = lynx_pcs_create_fwnode(node); in dpaa2_pcs_create()
268 if (pcs == ERR_PTR(-EPROBE_DEFER)) { in dpaa2_pcs_create()
269 netdev_dbg(mac->net_dev, "missing PCS device\n"); in dpaa2_pcs_create()
273 if (pcs == ERR_PTR(-ENODEV)) { in dpaa2_pcs_create()
274 netdev_err(mac->net_dev, "pcs-handle node not available\n"); in dpaa2_pcs_create()
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| /openbmc/linux/drivers/clocksource/ |
| H A D | timer-pistachio.c | 70 struct pistachio_clocksource *pcs = to_pistachio_clocksource(cs); in pistachio_clocksource_read_cycles() local
80 raw_spin_lock_irqsave(&pcs->lock, flags); in pistachio_clocksource_read_cycles()
81 overflow = gpt_readl(pcs->base, TIMER_CURRENT_OVERFLOW_VALUE, 0); in pistachio_clocksource_read_cycles()
82 counter = gpt_readl(pcs->base, TIMER_CURRENT_VALUE, 0); in pistachio_clocksource_read_cycles()
83 raw_spin_unlock_irqrestore(&pcs->lock, flags); in pistachio_clocksource_read_cycles()
96 struct pistachio_clocksource *pcs = to_pistachio_clocksource(cs); in pistachio_clksrc_set_mode() local
99 val = gpt_readl(pcs->base, TIMER_CFG, timeridx); in pistachio_clksrc_set_mode()
105 gpt_writel(pcs->base, val, TIMER_CFG, timeridx); in pistachio_clksrc_set_mode()
110 struct pistachio_clocksource *pcs = to_pistachio_clocksource(cs); in pistachio_clksrc_enable() local
114 gpt_writel(pcs->base, RELOAD_VALUE, TIMER_RELOAD_VALUE, timeridx); in pistachio_clksrc_enable()
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| /openbmc/linux/drivers/phy/qualcomm/ |
| H A D | phy-qcom-qmp.h | 31 #include "phy-qcom-qmp-pcs-v2.h"
33 #include "phy-qcom-qmp-pcs-v3.h"
35 #include "phy-qcom-qmp-pcs-v4.h"
37 #include "phy-qcom-qmp-pcs-v4_20.h"
39 #include "phy-qcom-qmp-pcs-v5.h"
41 #include "phy-qcom-qmp-pcs-v5_20.h"
43 #include "phy-qcom-qmp-pcs-v6.h"
45 #include "phy-qcom-qmp-pcs-v6_20.h"
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| H A D | phy-qcom-qmp-ufs.c | 24 #include "phy-qcom-qmp-pcs-ufs-v2.h"
25 #include "phy-qcom-qmp-pcs-ufs-v3.h"
26 #include "phy-qcom-qmp-pcs-ufs-v4.h"
27 #include "phy-qcom-qmp-pcs-ufs-v5.h"
28 #include "phy-qcom-qmp-pcs-ufs-v6.h"
70 /* PCS registers */
703 u16 pcs; member
711 /* Init sequence for PHY blocks - serdes, tx, rx, pcs */
718 const struct qmp_phy_init_tbl *pcs; member
728 /* Main init sequence for PHY blocks - serdes, tx, rx, pcs */
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